From: "Mi, Dapeng" <dapeng1.mi@linux.intel.com>
To: "Chen, Zide" <zide.chen@intel.com>, Yosry Ahmed <yosry@kernel.org>
Cc: Sean Christopherson <seanjc@google.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Peter Zijlstra <peterz@infradead.org>,
kvm@vger.kernel.org, Jim Mattson <jmattson@google.com>,
Andi Kleen <ak@linux.intel.com>,
Stephane Eranian <eranian@google.com>,
linux-kernel@vger.kernel.org, Mingwei Zhang <mizhang@google.com>,
Das Sandipan <Sandipan.Das@amd.com>,
Shukla Manali <Manali.Shukla@amd.com>,
Xudong Hao <xudong.hao@intel.com>
Subject: Re: [PATCH v3 13/18] KVM: x86/pmu: Populate CPUID.0AH:ECX fixed-counter bitmap
Date: Tue, 10 Nov 2026 14:28:10 +0800 [thread overview]
Message-ID: <f12bcb27-9c17-4b8c-b48c-c36a17e70ab6@linux.intel.com> (raw)
In-Reply-To: <f20b59bb-a3c6-4129-ba61-5cec4d975601@intel.com>
On 11/10/2026 4:41 AM, Chen, Zide wrote:
>
> On 11/6/2026 3:00 PM, Yosry Ahmed wrote:
>> On Thu, Nov 05, 2026 at 06:39:22PM -0700, Zide Chen wrote:
>>> PerfMon v5 adds a fixed-counter support bitmap in CPUID.0AH:ECX.
>>> This is the superset of EDX[4:0] which indicates the contiguous
>>> counters starting from 0. For backward compatibility, it's recommended
>>> to use the following to determine if a fixed counter is supported:
>>>
>>> FxCtr[i]_is_supported := ECX[i] || (EDX[4:0] > i);
>>>
>>> Originally-by: Yang Weijiang <weijiang.yang@intel.com>
>>> Signed-off-by: Zide Chen <zide.chen@intel.com>
>>> ---
>>> v3:
>>> - Remove '&' when populating entry->ecx. (Jim)
>>> - Gate entry->ecx on kvm_pmu_cap.version >= 5 in intel_pmu_refresh() to
>>> avoid enabling v5 fixed counters on hosts where KVM caps PMU at v2.
>>> ---
>>> arch/x86/kvm/cpuid.c | 5 ++++-
>>> arch/x86/kvm/vmx/pmu_intel.c | 8 ++++++++
>>> 2 files changed, 12 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
>>> index 3310c370c5fa..00a2ca6d3049 100644
>>> --- a/arch/x86/kvm/cpuid.c
>>> +++ b/arch/x86/kvm/cpuid.c
>>> @@ -1554,7 +1554,10 @@ static inline int __do_cpuid_func(struct kvm_cpuid_array *array, u32 function)
>>>
>>> entry->eax = eax.full;
>>> entry->ebx = kvm_pmu_cap.events_mask;
>>> - entry->ecx = 0;
>>> + if (kvm_pmu_cap.version >= 5)
>>> + entry->ecx = (u32)kvm_pmu_cap.fixed_cntr_mask64;
>>> + else
>>> + entry->ecx = 0;
>>> entry->edx = edx.full;
>>> break;
>>> }
>>> diff --git a/arch/x86/kvm/vmx/pmu_intel.c b/arch/x86/kvm/vmx/pmu_intel.c
>>> index 1372091dc1f8..37b34b588601 100644
>>> --- a/arch/x86/kvm/vmx/pmu_intel.c
>>> +++ b/arch/x86/kvm/vmx/pmu_intel.c
>>> @@ -597,7 +597,15 @@ static void intel_pmu_refresh(struct kvm_vcpu *vcpu)
>>> find_first_zero_bit(kvm_pmu_cap.fixed_cntr_mask,
>>> KVM_MAX_NR_FIXED_COUNTERS));
>>>
>>> + /* FxCtr[i]_is_supported := ECX[i] || (EDX[4:0] > i) */
>>> fixed_mask = BIT_ULL(nr_fixed_counters) - 1;
>>> + /*
>>> + * Do not enable fixed counters via the v5 ECX bitmap if KVM caps
>>> + * PMU version below 5 (e.g. when mediated PMU is disabled or on
>>> + * older hosts), matching KVM's advertised CPUID.0AH:ECX capability.
>>> + */
>>> + if (kvm_pmu_cap.version >= 5 && pmu->version >= 5)
>> Having to check both versions is confusing. Can they go out of sync?
>> Should we clamp pmu->version to kvm_pmu_cap.version and only check the
>> former?
> Yes, actually, other fields (bit_width, mask_length, and
> nr_{gp,fixed}_counters) in intel_pmu_refresh() are clamped to
> kvm_pmu_cap as well.
>
> pmu->version = min_t(int, eax.split.version_id, kvm_pmu_cap.version);
I'm not quite sure if we could do such clamp. I remember Sean ever said KVM
should allow user space to set the PMU capabilities which KVM doesn't
support, like what currently kselftest pmu_counters_test does, e.g., KVM
only supports up to PMU version 2 in non-mediated vPMU mode, but
pmu_counters_test can set PMU versions larger than 2.
>
> Without this, as more advanced PMU features are supported in KVM, we
> will have to manually validate guest features, and it seems this doesn't
> violate the general principles of "not policing CPUID configurations"
> and using the "effective vPMU version".
>
>>> + fixed_mask |= entry->ecx;
>>> fixed_mask &= kvm_pmu_cap.fixed_cntr_mask64;
>> I see why this is needed now, to re-apply KVM's fixed counter mask after
>> reading it, but if this is only needed there, it's probably clearer to
>> do:
>>
>> if (version >= 5)
>> fixed_mask |= (entry->ecx & kvm_pmu_cap.fixed_cntr_mask64);
> Agreed, this is cleaner. Will update accordingly. Thanks!
next prev parent reply other threads:[~2026-11-10 6:28 UTC|newest]
Thread overview: 58+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-06 1:39 [PATCH v3 00/18] KVM: x86/pmu: Add mediated vPMU PerfMon v5 support Zide Chen
2026-11-06 1:39 ` [PATCH v3 01/18] KVM: x86/pmu: Remove redundant Perf Global Status MSR bit definitions Zide Chen
2026-11-06 18:19 ` Yosry Ahmed
2026-11-06 1:39 ` [PATCH v3 02/18] KVM: x86/pmu: Rename all_valid_pmc_idx to pmc_exists Zide Chen
2026-11-06 18:21 ` Yosry Ahmed
2026-11-06 1:39 ` [PATCH v3 03/18] KVM: x86/pmu: Rename reserved_bits to eventsel_rsvd in kvm_pmu Zide Chen
2026-11-06 18:37 ` Yosry Ahmed
2026-11-06 21:16 ` Chen, Zide
2026-11-06 22:38 ` Yosry Ahmed
2026-11-06 1:39 ` [PATCH v3 04/18] KVM: x86/pmu: Add PMC bitmap accessor helpers Zide Chen
2026-11-06 19:09 ` Yosry Ahmed
2026-11-06 22:19 ` Chen, Zide
2026-11-06 22:35 ` Yosry Ahmed
2026-11-09 7:53 ` Mi, Dapeng
2026-11-09 17:56 ` Chen, Zide
2026-11-09 17:55 ` Chen, Zide
2026-11-09 18:07 ` Yosry Ahmed
2026-11-09 18:59 ` Chen, Zide
2026-11-09 21:12 ` Yosry Ahmed
2026-11-09 21:59 ` Chen, Zide
2026-11-09 22:07 ` Yosry Ahmed
2026-11-09 22:26 ` Chen, Zide
2026-11-06 1:39 ` [PATCH v3 05/18] KVM: x86/pmu: Drop nr_arch_{gp,fixed}_counters from kvm_pmu Zide Chen
2026-11-06 19:34 ` Yosry Ahmed
2026-11-07 0:42 ` Jim Mattson
2026-11-07 2:26 ` Yosry Ahmed
2026-11-09 22:42 ` Chen, Zide
2026-11-09 22:47 ` Chen, Zide
2026-11-06 1:39 ` [PATCH v3 06/18] KVM: x86/pmu: Expose kvm_host_pmu to vendor modules Zide Chen
2026-11-06 19:37 ` Yosry Ahmed
2026-11-06 1:39 ` [PATCH v3 07/18] perf/x86: Plumb counter bitmap from x86_pmu to x86_pmu_cap Zide Chen
2026-11-06 1:39 ` [PATCH v3 08/18] KVM: x86/pmu: Switch to bitmask-based KVM PMU capabilities Zide Chen
2026-11-06 20:05 ` Yosry Ahmed
2026-11-09 21:22 ` Chen, Zide
2026-11-09 20:50 ` Jim Mattson
2026-11-06 1:39 ` [PATCH v3 09/18] perf/x86: Remove num_counters_{gp,fixed} from x86_pmu_capability Zide Chen
2026-11-06 1:39 ` [PATCH v3 10/18] KVM: x86/pmu: Document GLOBAL_STATUS_RESET passthrough erratum Zide Chen
2026-11-06 20:14 ` Yosry Ahmed
2026-11-10 0:41 ` Chen, Zide
2026-11-09 20:51 ` Jim Mattson
2026-11-06 1:39 ` [PATCH v3 11/18] KVM: x86/pmu: Emulate IA32_PERF_GLOBAL_STATUS_SET MSR Zide Chen
2026-11-06 20:35 ` Yosry Ahmed
2026-11-09 23:44 ` Chen, Zide
2026-11-09 20:53 ` Jim Mattson
2026-11-06 1:39 ` [PATCH v3 12/18] KVM: x86/pmu: Emulate IA32_PERF_GLOBAL_INUSE MSR Zide Chen
2026-11-09 20:54 ` Jim Mattson
2026-11-06 1:39 ` [PATCH v3 13/18] KVM: x86/pmu: Populate CPUID.0AH:ECX fixed-counter bitmap Zide Chen
2026-11-06 21:00 ` Yosry Ahmed
2026-11-09 20:41 ` Chen, Zide
2026-11-10 6:28 ` Mi, Dapeng [this message]
2026-11-06 1:39 ` [PATCH v3 14/18] KVM: x86/pmu: Factor out fixed counter control bit calculation Zide Chen
2026-11-06 1:39 ` [PATCH v3 15/18] KVM: x86/pmu: Mask only OS/USR bits when filtering fixed counters Zide Chen
2026-11-06 21:19 ` Jim Mattson
2026-11-06 1:39 ` [PATCH v3 16/18] KVM: x86/pmu: Ignore AnyThread bit if CPUID.0AH:EDX[15] is set Zide Chen
2026-11-09 20:56 ` Jim Mattson
2026-11-06 1:39 ` [PATCH v3 17/18] KVM: x86/pmu: Advertise PerfMon version 5 on Intel hosts Zide Chen
2026-11-06 21:20 ` Jim Mattson
2026-11-06 1:39 ` [PATCH v3 18/18] KVM: selftests: Support fixed counters bitmap in pmu_counters_test Zide Chen
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