[PATCH] drm/amd/display: Don't select zero V_TOTAL_MIN/MAX on DCN2 seamless boot

[PATCH] drm/amd/display: Don't select zero V_TOTAL_MIN/MAX on DCN2 seamless boot

[Kylie C via B4 Relay]

From: Kylie C <kyliepc@proton.me>

Initialize V_TOTAL_MIN/MAX to V_TOTAL before enabling the selectors if
they are still 0, as optc1_program_timing() does without seamless boot.

Tested on Renoir (DCN 2.1) eDP with amdgpu.seamless=1.

This removes the flash between the bios logo & plymouth on my laptop.

Signed-off-by: Kylie C <kyliepc@proton.me>
---
Fixes the black screen when enabling amdgpu.seamless=1 on Renoir APU

With this plymouth smooth boot is possible on this hardware
---
 drivers/gpu/drm/amd/display/dc/optc/dcn20/dcn20_optc.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/drivers/gpu/drm/amd/display/dc/optc/dcn20/dcn20_optc.c b/drivers/gpu/drm/amd/display/dc/optc/dcn20/dcn20_optc.c
index 73cc8a713..2cdfe3d7a 100644
--- a/drivers/gpu/drm/amd/display/dc/optc/dcn20/dcn20_optc.c
+++ b/drivers/gpu/drm/amd/display/dc/optc/dcn20/dcn20_optc.c
@@ -449,6 +449,13 @@ void optc2_lock_doublebuffer_disable(struct timing_generator *optc)
 void optc2_setup_manual_trigger(struct timing_generator *optc)
 {
 	struct optc *optc1 = DCN10TG_FROM_TG(optc);
+	uint32_t v_total, v_total_max;
+
+	REG_GET(OTG_V_TOTAL_MAX, OTG_V_TOTAL_MAX, &v_total_max);
+	if (!v_total_max) {
+		REG_GET(OTG_V_TOTAL, OTG_V_TOTAL, &v_total);
+		optc->funcs->set_vtotal_min_max(optc, v_total, v_total);
+	}
 
 	/* Set the min/max selectors unconditionally so that
 	 * DMCUB fw may change OTG timings when necessary

---
base-commit: 77f548b127c6de34ce271fa09ba270cb1ef9f2da
change-id: 20261022-dcn2-seamless-vtotal-351d08d2df54

Best regards,
--  
Kylie C <kyliepc@proton.me>

Re: [PATCH] drm/amd/display: Don't select zero V_TOTAL_MIN/MAX on DCN2 seamless boot

[Alex Hung]

This affects more than DCN2, but I can fix patch title by removing "DCN2".

Reviewed-by: Alex Hung <alex.hung@amd.com>

On 10/22/26 07:30, Kylie C via B4 Relay wrote:
> [Some people who received this message don't often get email from devnull+kyliepc.proton.me@kernel.org. Learn why this is important at https://aka.ms/LearnAboutSenderIdentification ]
> 
> From: Kylie C <kyliepc@proton.me>
> 
> Initialize V_TOTAL_MIN/MAX to V_TOTAL before enabling the selectors if
> they are still 0, as optc1_program_timing() does without seamless boot.
> 
> Tested on Renoir (DCN 2.1) eDP with amdgpu.seamless=1.
> 
> This removes the flash between the bios logo & plymouth on my laptop.
> 
> Signed-off-by: Kylie C <kyliepc@proton.me>
> ---
> Fixes the black screen when enabling amdgpu.seamless=1 on Renoir APU
> 
> With this plymouth smooth boot is possible on this hardware
> ---
>   drivers/gpu/drm/amd/display/dc/optc/dcn20/dcn20_optc.c | 7 +++++++
>   1 file changed, 7 insertions(+)
> 
> diff --git a/drivers/gpu/drm/amd/display/dc/optc/dcn20/dcn20_optc.c b/drivers/gpu/drm/amd/display/dc/optc/dcn20/dcn20_optc.c
> index 73cc8a713..2cdfe3d7a 100644
> --- a/drivers/gpu/drm/amd/display/dc/optc/dcn20/dcn20_optc.c
> +++ b/drivers/gpu/drm/amd/display/dc/optc/dcn20/dcn20_optc.c
> @@ -449,6 +449,13 @@ void optc2_lock_doublebuffer_disable(struct timing_generator *optc)
>   void optc2_setup_manual_trigger(struct timing_generator *optc)
>   {
>          struct optc *optc1 = DCN10TG_FROM_TG(optc);
> +       uint32_t v_total, v_total_max;
> +
> +       REG_GET(OTG_V_TOTAL_MAX, OTG_V_TOTAL_MAX, &v_total_max);
> +       if (!v_total_max) {
> +               REG_GET(OTG_V_TOTAL, OTG_V_TOTAL, &v_total);
> +               optc->funcs->set_vtotal_min_max(optc, v_total, v_total);
> +       }
> 
>          /* Set the min/max selectors unconditionally so that
>           * DMCUB fw may change OTG timings when necessary
> 
> ---
> base-commit: 77f548b127c6de34ce271fa09ba270cb1ef9f2da
> change-id: 20261022-dcn2-seamless-vtotal-351d08d2df54
> 
> Best regards,
> --
> Kylie C <kyliepc@proton.me>