From: Gaurav Kohli <gaurav.kohli@oss.qualcomm.com>
To: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>,
"Rafael J. Wysocki" <rafael@kernel.org>,
Daniel Lezcano <daniel.lezcano@kernel.org>,
Zhang Rui <rui.zhang@intel.com>,
Lukasz Luba <lukasz.luba@arm.com>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Jonathan Corbet <corbet@lwn.net>,
Shuah Khan <skhan@linuxfoundation.org>,
Randy Dunlap <rdunlap@infradead.org>,
Amit Kucheria <amitk@kernel.org>,
Thara Gopinath <thara.gopinath@gmail.com>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>,
Abel Vesa <abelvesa@kernel.org>
Cc: linux-pm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org,
linux-arm-msm@vger.kernel.org,
Amit Kucheria <amit.kucheria@oss.qualcomm.com>
Subject: Re: [PATCH 5/6] arm64: dts: qcom: kodiak: use thermal hw-bin trips
Date: Thu, 22 Oct 2026 19:09:42 +0530 [thread overview]
Message-ID: <f83c366e-e3fe-4921-8407-ffa90b7f933f@oss.qualcomm.com> (raw)
In-Reply-To: <9800eb77-0188-4b16-a672-adb7ee1a603c@oss.qualcomm.com>
On 10/22/2026 2:39 PM, Konrad Dybcio wrote:
> On 10/2/26 12:47 PM, Gaurav Kohli wrote:
>> From: Amit Kucheria <amit.kucheria@oss.qualcomm.com>
>>
>> kodiak-based SoCs are binned at manufacturing time, with the bin
>> computed from the jtag-id and feat-id qfprom fuses. The tsens driver
>> now reads these and feeds the resulting bin to the thermal core, which
>> selects per-bin trip temperatures.
>>
>> Add the jtag-id and feat-id nvmem cells to the tsens nodes and convert
>> the passive mitigation trip points from a fixed 95C to per-bin values
>> (95C for bin 0x1, 105C for bin 0x2) using the new
>> temperature-bin/thermal-hw-bin properties.
>>
>> Signed-off-by: Amit Kucheria <amit.kucheria@oss.qualcomm.com>
>> Co-developed-by: Gaurav Kohli <gaurav.kohli@oss.qualcomm.com>
>> Signed-off-by: Gaurav Kohli <gaurav.kohli@oss.qualcomm.com>
>> ---
>> arch/arm64/boot/dts/qcom/kodiak.dtsi | 56 +++++++++++++++++++++++++++---------
>> 1 file changed, 42 insertions(+), 14 deletions(-)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/kodiak.dtsi b/arch/arm64/boot/dts/qcom/kodiak.dtsi
>> index 347815e5983e..f3bb9cd8f393 100644
>> --- a/arch/arm64/boot/dts/qcom/kodiak.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/kodiak.dtsi
>> @@ -1019,6 +1019,16 @@ gpu_speed_bin: gpu-speed-bin@1e9 {
>> reg = <0x1e9 0x2>;
>> bits = <5 8>;
>> };
>> + jtag_id: jtag-id@180 {
>> + reg = <0x180 0x4>;
>> + /* bits = <offset width>: 20 bits at offset 0 */
>> + bits = <0 20>;
>> + };
>> + feat_id: feat-id@180 {
>> + reg = <0x180 0x4>;
>> + /* bits = <offset width>: 8 bits at offset 20 */
>> + bits = <20 8>;
>> + };
>
> Couple nits: please keep a \n between each subnode
thanks for review, will fix this in v2.
>
>
> [...]
>
>> cpu0_alert1: trip-point1 {
>> - temperature = <95000>;
>> + temperature-bin = <95000 105000>;
>
> Please do <foo>, <bar> instead of <foo bar>
Sure, will update.
>
> Konrad
next prev parent reply other threads:[~2026-10-22 13:39 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-02 10:46 [PATCH 0/6] thermal: Add hardware-binned trip point support Gaurav Kohli
2026-10-02 10:46 ` [PATCH 1/6] dt-bindings: thermal: thermal-zones: add hardware-binning trip properties Gaurav Kohli
2026-10-13 6:24 ` Krzysztof Kozlowski
2026-10-19 14:09 ` Gaurav Kohli
2026-10-02 10:46 ` [PATCH 2/6] thermal: add hardware-binning trip-point filtering support Gaurav Kohli
2026-10-02 10:46 ` [PATCH 3/6] dt-bindings: thermal: qcom-tsens: document qcm6490 tsens Gaurav Kohli
2026-10-02 10:46 ` [PATCH 4/6] thermal: qcom: tsens: add hardware-bin trip-point filtering Gaurav Kohli
2026-10-22 9:09 ` Konrad Dybcio
2026-10-23 10:01 ` Gaurav Kohli
2026-10-02 10:47 ` [PATCH 5/6] arm64: dts: qcom: kodiak: use thermal hw-bin trips Gaurav Kohli
2026-10-22 9:09 ` Konrad Dybcio
2026-10-22 13:39 ` Gaurav Kohli [this message]
2026-10-02 10:47 ` [PATCH 6/6] arm64: dts: qcom: hamoa: add thermal hw-bin support Gaurav Kohli
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