* [PATCH v1 0/3] Add clock support for CMU_M2M [not found] <CGME20250808141238epcas5p4a1e2767d73926bff7ca12b8afd66c36c@epcas5p4.samsung.com> @ 2025-08-08 14:21 ` Raghav Sharma [not found] ` <CGME20250808141241epcas5p268673ad83b4cadce6362c9184195ccad@epcas5p2.samsung.com> ` (2 more replies) 0 siblings, 3 replies; 6+ messages in thread From: Raghav Sharma @ 2025-08-08 14:21 UTC (permalink / raw) To: krzk, s.nawrocki, cw00.choi, mturquette, sboyd, robh, conor+dt, sunyeal.hong, shin.son, alim.akhtar Cc: linux-samsung-soc, linux-clk, devicetree, linux-arm-kernel, linux-kernel, dev.tailor, chandan.vn, karthik.sun, raghav.s This series adds clock support for the CMU_M2M block. Patch[1/3]: dt-bindings: clock: exynosautov920: add m2m clock definitions - Adds DT binding for CMU_M2M and clock definitions Patch[2/3]: clk: samsung: exynosautov920: add block m2m clock support - Adds CMU_M2M clock driver support Patch[3/3]: arm64: dts: exynosautov920: add CMU_M2M clock DT nodes - Adds dt node for CMU_M2M Signed-off-by: Raghav Sharma <raghav.s@samsung.com> --- Raghav Sharma (3): dt-bindings: clock: exynosautov920: add m2m clock definitions clk: samsung: exynosautov920: add block m2m clock support arm64: dts: exynosautov920: add cmu_m2m clock DT nodes .../clock/samsung,exynosautov920-clock.yaml | 21 +++++++++ .../arm64/boot/dts/exynos/exynosautov920.dtsi | 13 ++++++ drivers/clk/samsung/clk-exynosautov920.c | 45 +++++++++++++++++++ .../clock/samsung,exynosautov920.h | 5 +++ 4 files changed, 84 insertions(+) base-commit: b7d4e259682caccb51a25283655f2c8f02e32d23 -- 2.34.1 ^ permalink raw reply [flat|nested] 6+ messages in thread
[parent not found: <CGME20250808141241epcas5p268673ad83b4cadce6362c9184195ccad@epcas5p2.samsung.com>]
* [PATCH v1 1/3] dt-bindings: clock: exynosautov920: add m2m clock definitions [not found] ` <CGME20250808141241epcas5p268673ad83b4cadce6362c9184195ccad@epcas5p2.samsung.com> @ 2025-08-08 14:21 ` Raghav Sharma 0 siblings, 0 replies; 6+ messages in thread From: Raghav Sharma @ 2025-08-08 14:21 UTC (permalink / raw) To: krzk, s.nawrocki, cw00.choi, mturquette, sboyd, robh, conor+dt, sunyeal.hong, shin.son, alim.akhtar Cc: linux-samsung-soc, linux-clk, devicetree, linux-arm-kernel, linux-kernel, dev.tailor, chandan.vn, karthik.sun, raghav.s Add device tree clock binding definitions for CMU_M2M Signed-off-by: Raghav Sharma <raghav.s@samsung.com> --- .../clock/samsung,exynosautov920-clock.yaml | 21 +++++++++++++++++++ .../clock/samsung,exynosautov920.h | 5 +++++ 2 files changed, 26 insertions(+) diff --git a/Documentation/devicetree/bindings/clock/samsung,exynosautov920-clock.yaml b/Documentation/devicetree/bindings/clock/samsung,exynosautov920-clock.yaml index 72f59db73f76..b2dfe6ed353a 100644 --- a/Documentation/devicetree/bindings/clock/samsung,exynosautov920-clock.yaml +++ b/Documentation/devicetree/bindings/clock/samsung,exynosautov920-clock.yaml @@ -38,6 +38,7 @@ properties: - samsung,exynosautov920-cmu-hsi0 - samsung,exynosautov920-cmu-hsi1 - samsung,exynosautov920-cmu-hsi2 + - samsung,exynosautov920-cmu-m2m - samsung,exynosautov920-cmu-misc - samsung,exynosautov920-cmu-peric0 - samsung,exynosautov920-cmu-peric1 @@ -226,6 +227,26 @@ allOf: - const: embd - const: ethernet + - if: + properties: + compatible: + contains: + const: samsung,exynosautov920-cmu-m2m + + then: + properties: + clocks: + items: + - description: External reference clock (38.4 MHz) + - description: CMU_M2M NOC clock (from CMU_TOP) + - description: CMU_M2M JPEG clock (from CMU_TOP) + + clock-names: + items: + - const: oscclk + - const: noc + - const: jpeg + required: - compatible - "#clock-cells" diff --git a/include/dt-bindings/clock/samsung,exynosautov920.h b/include/dt-bindings/clock/samsung,exynosautov920.h index 93e6233d1358..0342a988565a 100644 --- a/include/dt-bindings/clock/samsung,exynosautov920.h +++ b/include/dt-bindings/clock/samsung,exynosautov920.h @@ -295,4 +295,9 @@ #define CLK_DOUT_HSI2_ETHERNET 6 #define CLK_DOUT_HSI2_ETHERNET_PTP 7 +/* CMU_M2M */ +#define CLK_MOUT_M2M_JPEG_USER 1 +#define CLK_MOUT_M2M_NOC_USER 2 +#define CLK_DOUT_M2M_NOCP 3 + #endif /* _DT_BINDINGS_CLOCK_EXYNOSAUTOV920_H */ -- 2.34.1 ^ permalink raw reply [flat|nested] 6+ messages in thread
[parent not found: <CGME20250808141244epcas5p376bea07e3420876ca58d7059b8f3da75@epcas5p3.samsung.com>]
* [PATCH v1 2/3] clk: samsung: exynosautov920: add block m2m clock support [not found] ` <CGME20250808141244epcas5p376bea07e3420876ca58d7059b8f3da75@epcas5p3.samsung.com> @ 2025-08-08 14:21 ` Raghav Sharma 0 siblings, 0 replies; 6+ messages in thread From: Raghav Sharma @ 2025-08-08 14:21 UTC (permalink / raw) To: krzk, s.nawrocki, cw00.choi, mturquette, sboyd, robh, conor+dt, sunyeal.hong, shin.son, alim.akhtar Cc: linux-samsung-soc, linux-clk, devicetree, linux-arm-kernel, linux-kernel, dev.tailor, chandan.vn, karthik.sun, raghav.s Register compatible and cmu_info data to support clocks. CMU_M2M, this provides clocks for M2M block Signed-off-by: Raghav Sharma <raghav.s@samsung.com> --- drivers/clk/samsung/clk-exynosautov920.c | 45 ++++++++++++++++++++++++ 1 file changed, 45 insertions(+) diff --git a/drivers/clk/samsung/clk-exynosautov920.c b/drivers/clk/samsung/clk-exynosautov920.c index 572b6ace14ac..75deec8bece5 100644 --- a/drivers/clk/samsung/clk-exynosautov920.c +++ b/drivers/clk/samsung/clk-exynosautov920.c @@ -27,6 +27,7 @@ #define CLKS_NR_HSI0 (CLK_DOUT_HSI0_PCIE_APB + 1) #define CLKS_NR_HSI1 (CLK_MOUT_HSI1_USBDRD + 1) #define CLKS_NR_HSI2 (CLK_DOUT_HSI2_ETHERNET_PTP + 1) +#define CLKS_NR_M2M (CLK_DOUT_M2M_NOCP + 1) /* ---- CMU_TOP ------------------------------------------------------------ */ @@ -1821,6 +1822,47 @@ static const struct samsung_cmu_info hsi2_cmu_info __initconst = { .clk_name = "noc", }; +/* ---- CMU_M2M --------------------------------------------------------- */ + +/* Register Offset definitions for CMU_M2M (0x1a800000) */ +#define PLL_CON0_MUX_CLKCMU_M2M_JPEG_USER 0x600 +#define PLL_CON0_MUX_CLKCMU_M2M_NOC_USER 0x610 +#define CLK_CON_DIV_DIV_CLK_M2M_NOCP 0x1800 + +static const unsigned long m2m_clk_regs[] __initconst = { + PLL_CON0_MUX_CLKCMU_M2M_JPEG_USER, + PLL_CON0_MUX_CLKCMU_M2M_NOC_USER, + CLK_CON_DIV_DIV_CLK_M2M_NOCP, +}; + +/* List of parent clocks for Muxes in CMU_M2M */ +PNAME(mout_clkcmu_m2m_noc_user_p) = { "oscclk", "dout_clkcmu_m2m_noc" }; +PNAME(mout_clkcmu_m2m_jpeg_user_p) = { "oscclk", "dout_clkcmu_m2m_jpeg" }; + +static const struct samsung_mux_clock m2m_mux_clks[] __initconst = { + MUX(CLK_MOUT_M2M_JPEG_USER, "mout_clkcmu_m2m_jpeg_user", + mout_clkcmu_m2m_jpeg_user_p, PLL_CON0_MUX_CLKCMU_M2M_JPEG_USER, 4, 1), + MUX(CLK_MOUT_M2M_NOC_USER, "mout_clkcmu_m2m_noc_user", + mout_clkcmu_m2m_noc_user_p, PLL_CON0_MUX_CLKCMU_M2M_NOC_USER, 4, 1), +}; + +static const struct samsung_div_clock m2m_div_clks[] __initconst = { + DIV(CLK_DOUT_M2M_NOCP, "dout_m2m_nocp", + "mout_clkcmu_m2m_noc_user", CLK_CON_DIV_DIV_CLK_M2M_NOCP, + 0, 3), +}; + +static const struct samsung_cmu_info m2m_cmu_info __initconst = { + .mux_clks = m2m_mux_clks, + .nr_mux_clks = ARRAY_SIZE(m2m_mux_clks), + .div_clks = m2m_div_clks, + .nr_div_clks = ARRAY_SIZE(m2m_div_clks), + .nr_clk_ids = CLKS_NR_M2M, + .clk_regs = m2m_clk_regs, + .nr_clk_regs = ARRAY_SIZE(m2m_clk_regs), + .clk_name = "noc", +}; + static int __init exynosautov920_cmu_probe(struct platform_device *pdev) { const struct samsung_cmu_info *info; @@ -1851,6 +1893,9 @@ static const struct of_device_id exynosautov920_cmu_of_match[] = { }, { .compatible = "samsung,exynosautov920-cmu-hsi2", .data = &hsi2_cmu_info, + }, { + .compatible = "samsung,exynosautov920-cmu-m2m", + .data = &m2m_cmu_info, }, { } }; -- 2.34.1 ^ permalink raw reply [flat|nested] 6+ messages in thread
[parent not found: <CGME20250808141247epcas5p2c254f35146a6ea35b5c49c4316ba30a3@epcas5p2.samsung.com>]
* [PATCH v1 3/3] arm64: dts: exynosautov920: add CMU_M2M clock DT nodes [not found] ` <CGME20250808141247epcas5p2c254f35146a6ea35b5c49c4316ba30a3@epcas5p2.samsung.com> @ 2025-08-08 14:21 ` Raghav Sharma 2025-08-11 6:48 ` Krzysztof Kozlowski 0 siblings, 1 reply; 6+ messages in thread From: Raghav Sharma @ 2025-08-08 14:21 UTC (permalink / raw) To: krzk, s.nawrocki, cw00.choi, mturquette, sboyd, robh, conor+dt, sunyeal.hong, shin.son, alim.akhtar Cc: linux-samsung-soc, linux-clk, devicetree, linux-arm-kernel, linux-kernel, dev.tailor, chandan.vn, karthik.sun, raghav.s Add required dt node for CMU_M2M block, which provides clocks for M2M IP Signed-off-by: Raghav Sharma <raghav.s@samsung.com> --- arch/arm64/boot/dts/exynos/exynosautov920.dtsi | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm64/boot/dts/exynos/exynosautov920.dtsi b/arch/arm64/boot/dts/exynos/exynosautov920.dtsi index 0fdf2062930a..086d6bbc18b8 100644 --- a/arch/arm64/boot/dts/exynos/exynosautov920.dtsi +++ b/arch/arm64/boot/dts/exynos/exynosautov920.dtsi @@ -1454,6 +1454,19 @@ pinctrl_aud: pinctrl@1a460000 { reg = <0x1a460000 0x10000>; }; + cmu_m2m: clock-controller@0x1a800000 { + compatible = "samsung,exynosautov920-cmu-m2m"; + reg = <0x1a800000 0x8000>; + #clock-cells = <1>; + + clocks = <&xtcxo>, + <&cmu_top DOUT_CLKCMU_M2M_NOC>, + <&cmu_top DOUT_CLKCMU_M2M_JPEG>; + clock-names = "oscclk", + "noc", + "jpeg"; + }; + cmu_cpucl0: clock-controller@1ec00000 { compatible = "samsung,exynosautov920-cmu-cpucl0"; reg = <0x1ec00000 0x8000>; -- 2.34.1 ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v1 3/3] arm64: dts: exynosautov920: add CMU_M2M clock DT nodes 2025-08-08 14:21 ` [PATCH v1 3/3] arm64: dts: exynosautov920: add CMU_M2M clock DT nodes Raghav Sharma @ 2025-08-11 6:48 ` Krzysztof Kozlowski 2025-09-10 12:02 ` Raghav Sharma 0 siblings, 1 reply; 6+ messages in thread From: Krzysztof Kozlowski @ 2025-08-11 6:48 UTC (permalink / raw) To: Raghav Sharma, s.nawrocki, cw00.choi, mturquette, sboyd, robh, conor+dt, sunyeal.hong, shin.son, alim.akhtar Cc: linux-samsung-soc, linux-clk, devicetree, linux-arm-kernel, linux-kernel, dev.tailor, chandan.vn, karthik.sun On 08/08/2025 16:21, Raghav Sharma wrote: > Add required dt node for CMU_M2M block, which provides > clocks for M2M IP > > Signed-off-by: Raghav Sharma <raghav.s@samsung.com> > --- > arch/arm64/boot/dts/exynos/exynosautov920.dtsi | 13 +++++++++++++ > 1 file changed, 13 insertions(+) > > diff --git a/arch/arm64/boot/dts/exynos/exynosautov920.dtsi b/arch/arm64/boot/dts/exynos/exynosautov920.dtsi > index 0fdf2062930a..086d6bbc18b8 100644 > --- a/arch/arm64/boot/dts/exynos/exynosautov920.dtsi > +++ b/arch/arm64/boot/dts/exynos/exynosautov920.dtsi > @@ -1454,6 +1454,19 @@ pinctrl_aud: pinctrl@1a460000 { > reg = <0x1a460000 0x10000>; > }; > > + cmu_m2m: clock-controller@0x1a800000 { Are you sure this satisfies tests required by Samsung SoC maintainer profile? Best regards, Krzysztof ^ permalink raw reply [flat|nested] 6+ messages in thread
* RE: [PATCH v1 3/3] arm64: dts: exynosautov920: add CMU_M2M clock DT nodes 2025-08-11 6:48 ` Krzysztof Kozlowski @ 2025-09-10 12:02 ` Raghav Sharma 0 siblings, 0 replies; 6+ messages in thread From: Raghav Sharma @ 2025-09-10 12:02 UTC (permalink / raw) To: 'Krzysztof Kozlowski', s.nawrocki, cw00.choi, mturquette, sboyd, robh, conor+dt, sunyeal.hong, shin.son, alim.akhtar Cc: linux-samsung-soc, linux-clk, devicetree, linux-arm-kernel, linux-kernel, dev.tailor, chandan.vn, karthik.sun Hi Krzysztof > -----Original Message----- > From: Krzysztof Kozlowski <krzk@kernel.org> > Sent: Monday, August 11, 2025 12:19 PM > To: Raghav Sharma <raghav.s@samsung.com>; s.nawrocki@samsung.com; > cw00.choi@samsung.com; mturquette@baylibre.com; sboyd@kernel.org; > robh@kernel.org; conor+dt@kernel.org; sunyeal.hong@samsung.com; > shin.son@samsung.com; alim.akhtar@samsung.com > Cc: linux-samsung-soc@vger.kernel.org; linux-clk@vger.kernel.org; > devicetree@vger.kernel.org; linux-arm-kernel@lists.infradead.org; linux- > kernel@vger.kernel.org; dev.tailor@samsung.com; chandan.vn@samsung.com; > karthik.sun@samsung.com > Subject: Re: [PATCH v1 3/3] arm64: dts: exynosautov920: add CMU_M2M clock > DT nodes > > On 08/08/2025 16:21, Raghav Sharma wrote: > > Add required dt node for CMU_M2M block, which provides clocks for M2M > > IP > > > > Signed-off-by: Raghav Sharma <raghav.s@samsung.com> > > --- > > arch/arm64/boot/dts/exynos/exynosautov920.dtsi | 13 +++++++++++++ > > 1 file changed, 13 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/exynos/exynosautov920.dtsi > > b/arch/arm64/boot/dts/exynos/exynosautov920.dtsi > > index 0fdf2062930a..086d6bbc18b8 100644 > > --- a/arch/arm64/boot/dts/exynos/exynosautov920.dtsi > > +++ b/arch/arm64/boot/dts/exynos/exynosautov920.dtsi > > @@ -1454,6 +1454,19 @@ pinctrl_aud: pinctrl@1a460000 { > > reg = <0x1a460000 0x10000>; > > }; > > > > + cmu_m2m: clock-controller@0x1a800000 { > > > Are you sure this satisfies tests required by Samsung SoC maintainer profile? > Sorry for delay in reply, I was off for some time. I understood the requirement here and thanks for your guidance on the other thread. I shall post the new version post fixing the compilation warnings. > Best regards, > Krzysztof ^ permalink raw reply [flat|nested] 6+ messages in thread
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2025-08-08 14:21 ` [PATCH v1 0/3] Add clock support for CMU_M2M Raghav Sharma
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2025-08-08 14:21 ` [PATCH v1 1/3] dt-bindings: clock: exynosautov920: add m2m clock definitions Raghav Sharma
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2025-08-08 14:21 ` [PATCH v1 2/3] clk: samsung: exynosautov920: add block m2m clock support Raghav Sharma
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2025-08-08 14:21 ` [PATCH v1 3/3] arm64: dts: exynosautov920: add CMU_M2M clock DT nodes Raghav Sharma
2025-08-11 6:48 ` Krzysztof Kozlowski
2025-09-10 12:02 ` Raghav Sharma
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