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*  [PATCH] riscv: align pcie bus assign logic with ARM64
@ 2026-09-22  9:19 sun.wenhan
  2026-09-25 23:46 ` Paul Walmsley
  0 siblings, 1 reply; 4+ messages in thread
From: sun.wenhan @ 2026-09-22  9:19 UTC (permalink / raw)
  To: pjw
  Cc: palmer, aou, alex, sun.wenhan, linux-riscv, linux-kernel,
	liu.qingtao2, lv.yating, guo.chang2, deng.weixian, hu.yuye

From: sun wenhan <sun.wenhan@zte.com.cn>


RISC-V currently relies on the asm-generic default of
pcibios_assign_all_busses() returning 1, so the kernel always
re-assigns all PCI bus numbers and ignores the bus numbers already
set up by the firmware. This has two downsides:

1. As UEFI 2.8 has brought mature firmware support to RISC-V servers,
the OS can trust and inherit the PCI bus enumeration done by the
BIOS, skipping a redundant re-enumeration at boot and improving
the boot time.

2. The unconditional re-assignment causes bus numbering conflicts
during PCI rescan. When a root port that is not the last one in
the hierarchy is removed and the bus is rescanned, the kernel
fails with:

pci_bus 0000:01: busn_res: can not insert [bus 01-ff] under
[bus 00-ff] (conflicts with (null) [bus 02])

as reported for the same generic code in commit bd8cbe66c01d
("PCI: Make PCI bus renumbering configurable to avoid rescan
conflicts").

Define pcibios_assign_all_busses() the same way as ARM64,
so that RISC-V also preserves the bus numbers assigned by the
firmware by default instead of always re-assigning them. This keeps
RISC-V consistent with the other major architectures.

Signed-off-by: sun wenhan <sun.wenhan@zte.com.cn>
---
arch/riscv/include/asm/pci.h | 5 +++++
1 file changed, 5 insertions(+)

diff --git a/arch/riscv/include/asm/pci.h b/arch/riscv/include/asm/pci.h
index cc2a184cfc2e..b2f91abebd61 100644
--- a/arch/riscv/include/asm/pci.h
+++ b/arch/riscv/include/asm/pci.h
@@ -15,6 +15,11 @@
#define PCIBIOS_MIN_IO   4
#define PCIBIOS_MIN_MEM    16

+/*
+ * Set to 1 if the kernel should re-assign all PCI bus numbers
+ */
+#define pcibios_assign_all_busses() (pci_has_flag(PCI_REASSIGN_ALL_BUS))
+
#if defined(CONFIG_PCI) && defined(CONFIG_NUMA)
static inline int pcibus_to_node(struct pci_bus *bus)
{
--
2.27.0

^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re:  [PATCH] riscv: align pcie bus assign logic with ARM64
  2026-09-22  9:19 [PATCH] riscv: align pcie bus assign logic with ARM64 sun.wenhan
@ 2026-09-25 23:46 ` Paul Walmsley
  2026-09-29  9:30   ` sun.wenhan
  0 siblings, 1 reply; 4+ messages in thread
From: Paul Walmsley @ 2026-09-25 23:46 UTC (permalink / raw)
  To: sun.wenhan
  Cc: pjw, palmer, aou, alex, linux-riscv, linux-kernel, liu.qingtao2,
	lv.yating, guo.chang2, deng.weixian, hu.yuye

Hi

On Tue, 22 Sep 2026, sun.wenhan@zte.com.cn wrote:

> RISC-V currently relies on the asm-generic default of
> pcibios_assign_all_busses() returning 1, so the kernel always
> re-assigns all PCI bus numbers and ignores the bus numbers already
> set up by the firmware. This has two downsides:
> 
> 1. As UEFI 2.8 has brought mature firmware support to RISC-V servers,
> the OS can trust and inherit the PCI bus enumeration done by the
> BIOS, skipping a redundant re-enumeration at boot and improving
> the boot time.
> 
> 2. The unconditional re-assignment causes bus numbering conflicts
> during PCI rescan. When a root port that is not the last one in
> the hierarchy is removed and the bus is rescanned, the kernel
> fails with:
> 
> pci_bus 0000:01: busn_res: can not insert [bus 01-ff] under
> [bus 00-ff] (conflicts with (null) [bus 02])
> 
> as reported for the same generic code in commit bd8cbe66c01d
> ("PCI: Make PCI bus renumbering configurable to avoid rescan
> conflicts").
> 
> Define pcibios_assign_all_busses() the same way as ARM64,
> so that RISC-V also preserves the bus numbers assigned by the
> firmware by default instead of always re-assigning them. This keeps
> RISC-V consistent with the other major architectures.
> 
> Signed-off-by: sun wenhan <sun.wenhan@zte.com.cn>

This patch doesn't apply -- see 
https://gist.github.com/linux-riscv-bot/4f238956cd137e576af24c32c44d3437
-- and the commit ID mentioned in the patch description doesn't appear to 
exist in mainline.  Can you please fix these issues and resend?

thanks,


- Paul

^ permalink raw reply	[flat|nested] 4+ messages in thread

* [PATCH] riscv: align pcie bus assign logic with ARM64
  2026-09-25 23:46 ` Paul Walmsley
@ 2026-09-29  9:30   ` sun.wenhan
  2026-10-05 16:56     ` Paul Walmsley
  0 siblings, 1 reply; 4+ messages in thread
From: sun.wenhan @ 2026-09-29  9:30 UTC (permalink / raw)
  To: pjw
  Cc: pjw, palmer, aou, alex, linux-riscv, linux-kernel, jianjun.wang,
	liu.qingtao2, lv.yating, guo.chang2, deng.weixian, hu.yuye

RISC-V currently relies on the asm-generic default of
pcibios_assign_all_busses() returning 1, so the kernel always
re-assigns all PCI bus numbers and ignores the bus numbers already
set up by the firmware. This has two downsides.

As UEFI 2.8 has brought mature firmware support to RISC-V servers,
the OS can trust and inherit the PCI bus enumeration done by the
BIOS, skipping a redundant re-enumeration at boot and improving the
boot time.

The unconditional re-assignment also causes bus numbering conflicts
during PCI rescan. When a root port that is not the last one in the
hierarchy is removed and the bus is rescanned, the kernel fails
with:

    pci_bus 0000:01: busn_res: can not insert [bus 01-ff] under
    [bus 00-ff] (conflicts with (null) [bus 02])

Define pcibios_assign_all_busses() the same way as ARM64, so that
RISC-V also preserves the bus numbers assigned by the firmware by
default instead of always re-assigning them. This keeps RISC-V
consistent with the other major architectures.

Signed-off-by: sun wenhan <sun.wenhan@zte.com.cn>
---
 arch/riscv/include/asm/pci.h | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/riscv/include/asm/pci.h b/arch/riscv/include/asm/pci.h
index cc2a184cfc2e..b2f91abebd61 100644
--- a/arch/riscv/include/asm/pci.h
+++ b/arch/riscv/include/asm/pci.h
@@ -15,6 +15,11 @@
 #define PCIBIOS_MIN_IO		4
 #define PCIBIOS_MIN_MEM		16

+/*
+ * Set to 1 if the kernel should re-assign all PCI bus numbers
+ */
+#define pcibios_assign_all_busses() (pci_has_flag(PCI_REASSIGN_ALL_BUS))
+
 #if defined(CONFIG_PCI) && defined(CONFIG_NUMA)
 static inline int pcibus_to_node(struct pci_bus *bus)
 {
-- 
2.27.0

^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: [PATCH] riscv: align pcie bus assign logic with ARM64
  2026-09-29  9:30   ` sun.wenhan
@ 2026-10-05 16:56     ` Paul Walmsley
  0 siblings, 0 replies; 4+ messages in thread
From: Paul Walmsley @ 2026-10-05 16:56 UTC (permalink / raw)
  To: sun.wenhan
  Cc: pjw, palmer, aou, alex, linux-riscv, linux-kernel, jianjun.wang,
	liu.qingtao2, lv.yating, guo.chang2, deng.weixian, hu.yuye

Hi,

Thanks for updating the patch.  A few comments:

On Tue, 29 Sep 2026, sun.wenhan@zte.com.cn wrote:

> RISC-V currently relies on the asm-generic default of
> pcibios_assign_all_busses() returning 1, so the kernel always
> re-assigns all PCI bus numbers and ignores the bus numbers already
> set up by the firmware. This has two downsides.
> 
> As UEFI 2.8 has brought mature firmware support to RISC-V servers,
> the OS can trust and inherit the PCI bus enumeration done by the
> BIOS, skipping a redundant re-enumeration at boot and improving the
> boot time.
> 
> The unconditional re-assignment also causes bus numbering conflicts
> during PCI rescan. When a root port that is not the last one in the
> hierarchy is removed and the bus is rescanned, the kernel fails
> with:
> 
>     pci_bus 0000:01: busn_res: can not insert [bus 01-ff] under
>     [bus 00-ff] (conflicts with (null) [bus 02])
> 
> Define pcibios_assign_all_busses() the same way as ARM64, so that
> RISC-V also preserves the bus numbers assigned by the firmware by
> default instead of always re-assigning them. This keeps RISC-V
> consistent with the other major architectures.
> 
> Signed-off-by: sun wenhan <sun.wenhan@zte.com.cn>

- Please start your subject line with "[PATCH v2]" etc. when sending 
  updated versions of patches.  Please see
  https://www.kernel.org/doc/html/latest/process/submitting-patches.html#subject-line

- Some tools break when the name in your E-mail is an E-mail address.  I 
  fixed this up to match the same in your Signed-off-by:, but please fix 
  this for future patches.

Queued for v7.4, thanks.


- Paul

^ permalink raw reply	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2026-10-05 16:56 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2026-09-22  9:19 [PATCH] riscv: align pcie bus assign logic with ARM64 sun.wenhan
2026-09-25 23:46 ` Paul Walmsley
2026-09-29  9:30   ` sun.wenhan
2026-10-05 16:56     ` Paul Walmsley

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