Re: [PATCH 3/8] perf/x86: Update cap_user_rdpmc base on rdpmc user disable state

["Falcon, Thomas" <thomas.falcon@intel.com>]

On Fri, 2026-06-05 at 09:11 +0800, Dapeng Mi wrote:
> After introducing the RDPMC user disable feature, user-space RDPMC
> may
> return 0 instead of the actual event count. This creates an
> inconsistency
> with cap_user_rdpmc, where cap_user_rdpmc is set, but user-space
> RDPMC
> only returns 0.
> 
> To accurately represent the user-space RDPMC capability, update
> cap_user_rdpmc based on the RDPMC user disable state. If RDPMC user
> disable is enabled, cap_user_rdpmc is set to false, allowing user-
> space
> programs to fall back to the read() syscall to obtain the real event
> count.
> 
> Since arch_perf_update_userpage() could be called for software
> events,
> enhance x86_pmu_has_rdpmc_user_disable() to only check the x86 PMUs.

LGTM.

Reviewed-by: Thomas Falcon <thomas.falcon@intel.com>

Thanks,
Tom

> 
> Fixes: 59af95e028d4 ("perf/x86/intel: Add support for rdpmc user
> disable feature")
> Signed-off-by: Dapeng Mi <dapeng1.mi@linux.intel.com>
> Reviewed-by: Zide Chen <zide.chen@intel.com>
> ---
> 
> Original patch link:
> https://lore.kernel.org/all/20260316050838.3624051-2-dapeng1.mi@linux.intel.com/
> 
>  arch/x86/events/core.c       | 3 +++
>  arch/x86/events/perf_event.h | 5 +++--
>  2 files changed, 6 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/x86/events/core.c b/arch/x86/events/core.c
> index 3bd0522afe6d..6cd95b8e31cb 100644
> --- a/arch/x86/events/core.c
> +++ b/arch/x86/events/core.c
> @@ -2797,6 +2797,9 @@ void arch_perf_update_userpage(struct
> perf_event *event,
>  	userpg->cap_user_time_zero = 0;
>  	userpg->cap_user_rdpmc =
>  		!!(event->hw.flags & PERF_EVENT_FLAG_USER_READ_CNT);
> +	if (x86_pmu_has_rdpmc_user_disable(event->pmu) &&
> +	    event->hw.config &
> ARCH_PERFMON_EVENTSEL_RDPMC_USER_DISABLE)
> +		userpg->cap_user_rdpmc = 0;
>  	userpg->pmc_width = x86_pmu.cntval_bits;
>  
>  	if (!using_native_sched_clock() || !sched_clock_stable())
> diff --git a/arch/x86/events/perf_event.h
> b/arch/x86/events/perf_event.h
> index dbb5c8e8a8ea..4003e2e0aa9c 100644
> --- a/arch/x86/events/perf_event.h
> +++ b/arch/x86/events/perf_event.h
> @@ -1359,8 +1359,9 @@ static inline u64
> x86_pmu_get_event_config(struct perf_event *event)
>  
>  static inline bool x86_pmu_has_rdpmc_user_disable(struct pmu *pmu)
>  {
> -	return !!(hybrid(pmu, config_mask) &
> -		 ARCH_PERFMON_EVENTSEL_RDPMC_USER_DISABLE);
> +	return is_x86_pmu(pmu) &&
> +	       (hybrid(pmu, config_mask) &
> +		ARCH_PERFMON_EVENTSEL_RDPMC_USER_DISABLE);
>  }
>  
>  extern struct event_constraint emptyconstraint;