From: "Cunhao Lu" <1579567540@qq.com>
To: "Thinh Nguyen" <Thinh.Nguyen@synopsys.com>
Cc: "linux-clk@vger.kernel.org" <linux-clk@vger.kernel.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"linux-rockchip@lists.infradead.org"
<linux-rockchip@lists.infradead.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-phy@lists.infradead.org" <linux-phy@lists.infradead.org>,
"linux-usb@vger.kernel.org" <linux-usb@vger.kernel.org>
Subject: Re: [PATCH 23/27] usb: dwc3: Configure RK3572 PIPE port before discovery
Date: Wed, 4 Nov 2026 16:11:07 +0800 [thread overview]
Message-ID: <tencent_B554CB5826E48E2405EC22E6FAED3721D10A@qq.com> (raw)
In-Reply-To: <auqRrz1kM-sfJEQ-@vbox>
Hi,
> This can just be:
> if (device_property_match_string(dev, "phy-names", "usb3-phy") >= 0 &&
> (speed == USB_SPEED_UNKNOWN || speed >= USB_SPEED_SUPER))
Agreed. This glue-side check will be removed with the helper when the
configuration moves to the PHY drivers.
> This looks like something that can be done in the phy driver. The other
> Rockchip platforms such as RK3588 do this in the phy right? Why it must
> be here?
You are right. I checked the RK3572 hardware capabilities and tested a
PHY-based implementation on the OK3572-C. Both controllers report DRD
capability, so DWC3 uses one USB2 and one USB3 port rather than taking the
host-only port-discovery path. On USB1, USB3 PHY initialization is still
called with the PIPE port disabled. My original reason for placing this
before DWC3 core probe was incorrect.
I will fix this issue in v2.
Best regards,
Cunhao Lu
next prev parent reply other threads:[~2026-11-04 8:11 UTC|newest]
Thread overview: 64+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-21 16:10 [PATCH 00/27] rockchip: Add RK3572 and Forlinx OK3572-C support Cunhao Lu via B4 Relay
2026-10-21 16:10 ` [PATCH 01/27] dt-bindings: clock: rockchip: Add RK3572 CRU Cunhao Lu via B4 Relay
2026-10-30 17:53 ` Rob Herring (Arm)
2026-10-21 16:10 ` [PATCH 02/27] dt-bindings: power: rockchip: Add RK3572 power domains Cunhao Lu via B4 Relay
2026-10-30 17:55 ` Rob Herring (Arm)
2026-10-21 16:11 ` [PATCH 03/27] dt-bindings: soc: rockchip: Add RK3572 PMU and GRF Cunhao Lu via B4 Relay
2026-10-30 17:49 ` Rob Herring (Arm)
2026-10-21 16:11 ` [PATCH 04/27] dt-bindings: mfd: syscon: Add RK3572 QoS register compatible Cunhao Lu via B4 Relay
2026-10-30 17:51 ` Rob Herring
2026-10-21 16:11 ` [PATCH 05/27] dt-bindings: pinctrl: rockchip: Add RK3572 Cunhao Lu via B4 Relay
2026-10-30 18:14 ` Rob Herring (Arm)
2026-11-04 13:04 ` Linus Walleij
2026-10-21 16:11 ` [PATCH 06/27] dt-bindings: gpio: rockchip: Add RK3572 GPIO banks Cunhao Lu via B4 Relay
2026-10-30 18:18 ` Rob Herring (Arm)
2026-11-04 13:05 ` Linus Walleij
2026-10-21 16:11 ` [PATCH 07/27] clk: rockchip: Add RK3572 clock and reset support Cunhao Lu via B4 Relay
2026-10-21 22:26 ` Heiko Stübner
2026-10-22 6:09 ` Cunhao Lu
2026-10-22 7:38 ` Heiko Stübner
2026-10-22 8:31 ` Cunhao Lu
2026-10-21 16:11 ` [PATCH 08/27] pinctrl: rockchip: Add RK3572 support Cunhao Lu via B4 Relay
2026-11-04 14:09 ` Heiko Stübner
2026-10-21 16:11 ` [PATCH 09/27] gpio: rockchip: Add RK3572 GPIO support Cunhao Lu via B4 Relay
2026-10-28 10:16 ` Bartosz Golaszewski
2026-11-01 11:31 ` Cunhao Lu
2026-10-21 16:11 ` [PATCH 10/27] pmdomain: rockchip: Add RK3572 boot peripheral domains Cunhao Lu via B4 Relay
2026-10-21 16:11 ` [PATCH 11/27] dt-bindings: i2c: rk3x: Add RK3572 Cunhao Lu via B4 Relay
2026-10-26 22:34 ` Andi Shyti
2026-10-30 17:54 ` Rob Herring (Arm)
2026-10-21 16:11 ` [PATCH 12/27] dt-bindings: serial: snps-dw-apb-uart: " Cunhao Lu via B4 Relay
2026-10-30 18:18 ` Rob Herring (Arm)
2026-10-21 16:11 ` [PATCH 13/27] dt-bindings: mmc: rockchip: Add RK3572 controllers Cunhao Lu via B4 Relay
2026-10-30 17:54 ` Rob Herring (Arm)
2026-10-21 16:11 ` [PATCH 14/27] dt-bindings: net: rockchip-dwmac: Add RK3572 Cunhao Lu via B4 Relay
2026-10-21 17:14 ` Andrew Lunn
2026-10-22 6:03 ` Cunhao Lu
2026-10-21 16:11 ` [PATCH 15/27] dt-bindings: thermal: rockchip: " Cunhao Lu via B4 Relay
2026-10-30 17:57 ` Rob Herring (Arm)
2026-10-21 16:11 ` [PATCH 16/27] net: stmmac: dwmac-rk: Add RK3572 support Cunhao Lu via B4 Relay
2026-10-21 17:09 ` Andrew Lunn
2026-10-22 5:33 ` Cunhao Lu
2026-10-21 16:11 ` [PATCH 17/27] thermal: rockchip: " Cunhao Lu via B4 Relay
2026-10-21 16:11 ` [PATCH 18/27] dt-bindings: phy: rockchip-inno-usb2: Add RK3572 Cunhao Lu via B4 Relay
2026-10-30 17:56 ` Rob Herring (Arm)
2026-10-21 16:11 ` [PATCH 19/27] dt-bindings: phy: rockchip-naneng-combphy: " Cunhao Lu via B4 Relay
2026-10-30 18:17 ` Rob Herring (Arm)
2026-10-21 16:11 ` [PATCH 20/27] dt-bindings: usb: rockchip: Add RK3572 DWC3 controller Cunhao Lu via B4 Relay
2026-10-30 17:55 ` Rob Herring (Arm)
2026-10-21 16:11 ` [PATCH 21/27] phy: rockchip-inno-usb2: Add RK3572 support Cunhao Lu via B4 Relay
2026-11-01 10:51 ` Manivannan Sadhasivam
2026-11-01 11:39 ` Cunhao Lu
2026-10-21 16:11 ` [PATCH 22/27] phy: rockchip-naneng-combphy: " Cunhao Lu via B4 Relay
2026-10-21 16:11 ` [PATCH 23/27] usb: dwc3: Configure RK3572 PIPE port before discovery Cunhao Lu via B4 Relay
2026-11-04 2:09 ` Thinh Nguyen
2026-11-04 8:11 ` Cunhao Lu [this message]
2026-10-21 16:11 ` [PATCH 24/27] mmc: dw_mmc-rockchip: Keep RK3572 NVM domain powered Cunhao Lu via B4 Relay
2026-10-27 0:53 ` Shawn Lin
2026-10-27 8:14 ` Cunhao Lu
2026-10-21 16:11 ` [PATCH 25/27] dt-bindings: arm: rockchip: Add Forlinx OK3572-C Cunhao Lu via B4 Relay
2026-10-30 18:19 ` Rob Herring (Arm)
2026-10-21 16:11 ` [PATCH 26/27] arm64: dts: rockchip: Add RK3572 SoC Cunhao Lu via B4 Relay
2026-10-21 16:11 ` [PATCH 27/27] arm64: dts: rockchip: Add initial support for Forlinx OK3572-C Cunhao Lu via B4 Relay
2026-10-21 23:00 ` [PATCH 00/27] rockchip: Add RK3572 and Forlinx OK3572-C support Shawn Lin
2026-10-22 6:37 ` Cunhao Lu
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