* [PATCH 1/3] perf/x86/intel/cstate: add missing CPU IDs
@ 2017-09-08 21:34 kan.liang
2017-09-08 21:34 ` [PATCH 2/3] perf/x86/msr: " kan.liang
` (2 more replies)
0 siblings, 3 replies; 6+ messages in thread
From: kan.liang @ 2017-09-08 21:34 UTC (permalink / raw)
To: tglx, peterz, mingo, linux-kernel
Cc: harry.pan, srinivas.pandruvada, piotr.luc, ak, Kan Liang
From: Kan Liang <Kan.liang@intel.com>
Skylake server uses the same C-state residency events as Sandy Bridge.
Denverton and Gemini lake use the same C-state residency events as
Apollo Lake.
Signed-off-by: Kan Liang <Kan.liang@intel.com>
---
arch/x86/events/intel/cstate.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/x86/events/intel/cstate.c b/arch/x86/events/intel/cstate.c
index 4cf100f..72db066 100644
--- a/arch/x86/events/intel/cstate.c
+++ b/arch/x86/events/intel/cstate.c
@@ -552,6 +552,7 @@ static const struct x86_cpu_id intel_cstates_match[] __initconst = {
X86_CSTATES_MODEL(INTEL_FAM6_SKYLAKE_MOBILE, snb_cstates),
X86_CSTATES_MODEL(INTEL_FAM6_SKYLAKE_DESKTOP, snb_cstates),
+ X86_CSTATES_MODEL(INTEL_FAM6_SKYLAKE_X, snb_cstates),
X86_CSTATES_MODEL(INTEL_FAM6_KABYLAKE_MOBILE, snb_cstates),
X86_CSTATES_MODEL(INTEL_FAM6_KABYLAKE_DESKTOP, snb_cstates),
@@ -560,6 +561,9 @@ static const struct x86_cpu_id intel_cstates_match[] __initconst = {
X86_CSTATES_MODEL(INTEL_FAM6_XEON_PHI_KNM, knl_cstates),
X86_CSTATES_MODEL(INTEL_FAM6_ATOM_GOLDMONT, glm_cstates),
+ X86_CSTATES_MODEL(INTEL_FAM6_ATOM_DENVERTON, glm_cstates),
+
+ X86_CSTATES_MODEL(INTEL_FAM6_ATOM_GEMINI_LAKE, glm_cstates),
{ },
};
MODULE_DEVICE_TABLE(x86cpu, intel_cstates_match);
--
2.9.4
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH 2/3] perf/x86/msr: add missing CPU IDs
2017-09-08 21:34 [PATCH 1/3] perf/x86/intel/cstate: add missing CPU IDs kan.liang
@ 2017-09-08 21:34 ` kan.liang
2017-09-25 10:09 ` [tip:x86/urgent] perf/x86/msr: Add " tip-bot for Kan Liang
2017-09-08 21:34 ` [PATCH 3/3] perf/x86/intel/rapl: add " kan.liang
2017-09-25 10:08 ` [tip:x86/urgent] perf/x86/intel/cstate: " tip-bot for Kan Liang
2 siblings, 1 reply; 6+ messages in thread
From: kan.liang @ 2017-09-08 21:34 UTC (permalink / raw)
To: tglx, peterz, mingo, linux-kernel
Cc: harry.pan, srinivas.pandruvada, piotr.luc, ak, Kan Liang
From: Kan Liang <Kan.liang@intel.com>
Goldmont, Glodmont plus and Xeon Phi have MSR_SMI_COUNT as well.
Signed-off-by: Kan Liang <Kan.liang@intel.com>
---
arch/x86/events/msr.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/x86/events/msr.c b/arch/x86/events/msr.c
index 4bb3ec6..0672367 100644
--- a/arch/x86/events/msr.c
+++ b/arch/x86/events/msr.c
@@ -63,6 +63,14 @@ static bool test_intel(int idx)
case INTEL_FAM6_ATOM_SILVERMONT1:
case INTEL_FAM6_ATOM_SILVERMONT2:
case INTEL_FAM6_ATOM_AIRMONT:
+
+ case INTEL_FAM6_ATOM_GOLDMONT:
+ case INTEL_FAM6_ATOM_DENVERTON:
+
+ case INTEL_FAM6_ATOM_GEMINI_LAKE:
+
+ case INTEL_FAM6_XEON_PHI_KNL:
+ case INTEL_FAM6_XEON_PHI_KNM:
if (idx == PERF_MSR_SMI)
return true;
break;
--
2.9.4
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH 3/3] perf/x86/intel/rapl: add missing CPU IDs
2017-09-08 21:34 [PATCH 1/3] perf/x86/intel/cstate: add missing CPU IDs kan.liang
2017-09-08 21:34 ` [PATCH 2/3] perf/x86/msr: " kan.liang
@ 2017-09-08 21:34 ` kan.liang
2017-09-25 10:09 ` [tip:x86/urgent] perf/x86/intel/rapl: Add " tip-bot for Kan Liang
2017-09-25 10:08 ` [tip:x86/urgent] perf/x86/intel/cstate: " tip-bot for Kan Liang
2 siblings, 1 reply; 6+ messages in thread
From: kan.liang @ 2017-09-08 21:34 UTC (permalink / raw)
To: tglx, peterz, mingo, linux-kernel
Cc: harry.pan, srinivas.pandruvada, piotr.luc, ak, Kan Liang
From: Kan Liang <Kan.liang@intel.com>
DENVERTON and GEMINI_LAKE support same RAPL counters as Apollo Lake.
Signed-off-by: Kan Liang <Kan.liang@intel.com>
---
arch/x86/events/intel/rapl.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/x86/events/intel/rapl.c b/arch/x86/events/intel/rapl.c
index 8e2457c..005908e 100644
--- a/arch/x86/events/intel/rapl.c
+++ b/arch/x86/events/intel/rapl.c
@@ -775,6 +775,9 @@ static const struct x86_cpu_id rapl_cpu_match[] __initconst = {
X86_RAPL_MODEL_MATCH(INTEL_FAM6_KABYLAKE_DESKTOP, skl_rapl_init),
X86_RAPL_MODEL_MATCH(INTEL_FAM6_ATOM_GOLDMONT, hsw_rapl_init),
+ X86_RAPL_MODEL_MATCH(INTEL_FAM6_ATOM_DENVERTON, hsw_rapl_init),
+
+ X86_RAPL_MODEL_MATCH(INTEL_FAM6_ATOM_GEMINI_LAKE, hsw_rapl_init),
{},
};
--
2.9.4
^ permalink raw reply [flat|nested] 6+ messages in thread
* [tip:x86/urgent] perf/x86/intel/cstate: Add missing CPU IDs
2017-09-08 21:34 [PATCH 1/3] perf/x86/intel/cstate: add missing CPU IDs kan.liang
2017-09-08 21:34 ` [PATCH 2/3] perf/x86/msr: " kan.liang
2017-09-08 21:34 ` [PATCH 3/3] perf/x86/intel/rapl: add " kan.liang
@ 2017-09-25 10:08 ` tip-bot for Kan Liang
2 siblings, 0 replies; 6+ messages in thread
From: tip-bot for Kan Liang @ 2017-09-25 10:08 UTC (permalink / raw)
To: linux-tip-commits; +Cc: mingo, tglx, Kan.liang, hpa, linux-kernel
Commit-ID: b09c146f8f63c0e03adba74df76bf9c2be466fec
Gitweb: http://git.kernel.org/tip/b09c146f8f63c0e03adba74df76bf9c2be466fec
Author: Kan Liang <Kan.liang@intel.com>
AuthorDate: Fri, 8 Sep 2017 17:34:47 -0400
Committer: Thomas Gleixner <tglx@linutronix.de>
CommitDate: Mon, 25 Sep 2017 09:36:17 +0200
perf/x86/intel/cstate: Add missing CPU IDs
Skylake server uses the same C-state residency events as Sandy Bridge.
Denverton and Gemini lake use the same C-state residency events as
Apollo Lake.
Signed-off-by: Kan Liang <Kan.liang@intel.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: ak@linux.intel.com
Cc: peterz@infradead.org
Cc: piotr.luc@intel.com
Cc: harry.pan@intel.com
Cc: srinivas.pandruvada@linux.intel.com
Link: http://lkml.kernel.org/r/20170908213449.6224-1-kan.liang@intel.com
---
arch/x86/events/intel/cstate.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/x86/events/intel/cstate.c b/arch/x86/events/intel/cstate.c
index 4cf100f..72db066 100644
--- a/arch/x86/events/intel/cstate.c
+++ b/arch/x86/events/intel/cstate.c
@@ -552,6 +552,7 @@ static const struct x86_cpu_id intel_cstates_match[] __initconst = {
X86_CSTATES_MODEL(INTEL_FAM6_SKYLAKE_MOBILE, snb_cstates),
X86_CSTATES_MODEL(INTEL_FAM6_SKYLAKE_DESKTOP, snb_cstates),
+ X86_CSTATES_MODEL(INTEL_FAM6_SKYLAKE_X, snb_cstates),
X86_CSTATES_MODEL(INTEL_FAM6_KABYLAKE_MOBILE, snb_cstates),
X86_CSTATES_MODEL(INTEL_FAM6_KABYLAKE_DESKTOP, snb_cstates),
@@ -560,6 +561,9 @@ static const struct x86_cpu_id intel_cstates_match[] __initconst = {
X86_CSTATES_MODEL(INTEL_FAM6_XEON_PHI_KNM, knl_cstates),
X86_CSTATES_MODEL(INTEL_FAM6_ATOM_GOLDMONT, glm_cstates),
+ X86_CSTATES_MODEL(INTEL_FAM6_ATOM_DENVERTON, glm_cstates),
+
+ X86_CSTATES_MODEL(INTEL_FAM6_ATOM_GEMINI_LAKE, glm_cstates),
{ },
};
MODULE_DEVICE_TABLE(x86cpu, intel_cstates_match);
^ permalink raw reply [flat|nested] 6+ messages in thread
* [tip:x86/urgent] perf/x86/msr: Add missing CPU IDs
2017-09-08 21:34 ` [PATCH 2/3] perf/x86/msr: " kan.liang
@ 2017-09-25 10:09 ` tip-bot for Kan Liang
0 siblings, 0 replies; 6+ messages in thread
From: tip-bot for Kan Liang @ 2017-09-25 10:09 UTC (permalink / raw)
To: linux-tip-commits; +Cc: linux-kernel, hpa, tglx, Kan.liang, mingo
Commit-ID: 1aaccc40a1864053da26605b0297be16dd52641e
Gitweb: http://git.kernel.org/tip/1aaccc40a1864053da26605b0297be16dd52641e
Author: Kan Liang <Kan.liang@intel.com>
AuthorDate: Fri, 8 Sep 2017 17:34:48 -0400
Committer: Thomas Gleixner <tglx@linutronix.de>
CommitDate: Mon, 25 Sep 2017 09:36:17 +0200
perf/x86/msr: Add missing CPU IDs
Goldmont, Glodmont plus and Xeon Phi have MSR_SMI_COUNT as well.
Signed-off-by: Kan Liang <Kan.liang@intel.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: ak@linux.intel.com
Cc: peterz@infradead.org
Cc: piotr.luc@intel.com
Cc: harry.pan@intel.com
Cc: srinivas.pandruvada@linux.intel.com
Link: http://lkml.kernel.org/r/20170908213449.6224-2-kan.liang@intel.com
---
arch/x86/events/msr.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/x86/events/msr.c b/arch/x86/events/msr.c
index 4bb3ec6..0672367 100644
--- a/arch/x86/events/msr.c
+++ b/arch/x86/events/msr.c
@@ -63,6 +63,14 @@ static bool test_intel(int idx)
case INTEL_FAM6_ATOM_SILVERMONT1:
case INTEL_FAM6_ATOM_SILVERMONT2:
case INTEL_FAM6_ATOM_AIRMONT:
+
+ case INTEL_FAM6_ATOM_GOLDMONT:
+ case INTEL_FAM6_ATOM_DENVERTON:
+
+ case INTEL_FAM6_ATOM_GEMINI_LAKE:
+
+ case INTEL_FAM6_XEON_PHI_KNL:
+ case INTEL_FAM6_XEON_PHI_KNM:
if (idx == PERF_MSR_SMI)
return true;
break;
^ permalink raw reply [flat|nested] 6+ messages in thread
* [tip:x86/urgent] perf/x86/intel/rapl: Add missing CPU IDs
2017-09-08 21:34 ` [PATCH 3/3] perf/x86/intel/rapl: add " kan.liang
@ 2017-09-25 10:09 ` tip-bot for Kan Liang
0 siblings, 0 replies; 6+ messages in thread
From: tip-bot for Kan Liang @ 2017-09-25 10:09 UTC (permalink / raw)
To: linux-tip-commits; +Cc: mingo, tglx, linux-kernel, hpa, Kan.liang
Commit-ID: 450a97893559354b927c935f39ee11126f01f520
Gitweb: http://git.kernel.org/tip/450a97893559354b927c935f39ee11126f01f520
Author: Kan Liang <Kan.liang@intel.com>
AuthorDate: Fri, 8 Sep 2017 17:34:49 -0400
Committer: Thomas Gleixner <tglx@linutronix.de>
CommitDate: Mon, 25 Sep 2017 09:36:17 +0200
perf/x86/intel/rapl: Add missing CPU IDs
DENVERTON and GEMINI_LAKE support same RAPL counters as Apollo Lake.
Signed-off-by: Kan Liang <Kan.liang@intel.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: ak@linux.intel.com
Cc: peterz@infradead.org
Cc: piotr.luc@intel.com
Cc: harry.pan@intel.com
Cc: srinivas.pandruvada@linux.intel.com
Link: http://lkml.kernel.org/r/20170908213449.6224-3-kan.liang@intel.com
---
arch/x86/events/intel/rapl.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/x86/events/intel/rapl.c b/arch/x86/events/intel/rapl.c
index 8e2457c..005908e 100644
--- a/arch/x86/events/intel/rapl.c
+++ b/arch/x86/events/intel/rapl.c
@@ -775,6 +775,9 @@ static const struct x86_cpu_id rapl_cpu_match[] __initconst = {
X86_RAPL_MODEL_MATCH(INTEL_FAM6_KABYLAKE_DESKTOP, skl_rapl_init),
X86_RAPL_MODEL_MATCH(INTEL_FAM6_ATOM_GOLDMONT, hsw_rapl_init),
+ X86_RAPL_MODEL_MATCH(INTEL_FAM6_ATOM_DENVERTON, hsw_rapl_init),
+
+ X86_RAPL_MODEL_MATCH(INTEL_FAM6_ATOM_GEMINI_LAKE, hsw_rapl_init),
{},
};
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2017-09-25 10:10 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2017-09-08 21:34 [PATCH 1/3] perf/x86/intel/cstate: add missing CPU IDs kan.liang
2017-09-08 21:34 ` [PATCH 2/3] perf/x86/msr: " kan.liang
2017-09-25 10:09 ` [tip:x86/urgent] perf/x86/msr: Add " tip-bot for Kan Liang
2017-09-08 21:34 ` [PATCH 3/3] perf/x86/intel/rapl: add " kan.liang
2017-09-25 10:09 ` [tip:x86/urgent] perf/x86/intel/rapl: Add " tip-bot for Kan Liang
2017-09-25 10:08 ` [tip:x86/urgent] perf/x86/intel/cstate: " tip-bot for Kan Liang
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
Powered by JetHome