From: tip-bot for Fenghua Yu <tipbot@zytor.com>
To: linux-tip-commits@vger.kernel.org
Cc: vikas.shivappa@intel.com, mingo@kernel.org, tglx@linutronix.de,
tony.luck@intel.com, ravi.v.shankar@intel.com,
fenghua.yu@intel.com, reinette.chatre@intel.com,
linux-kernel@vger.kernel.org, hpa@zytor.com,
sai.praneeth.prakhya@intel.com
Subject: [tip:x86/cache] x86/intel_rdt: Enumerate L2 Code and Data Prioritization (CDP) feature
Date: Thu, 18 Jan 2018 00:37:57 -0800 [thread overview]
Message-ID: <tip-a511e7935378ef1f321456a90beae2a2632d3d83@git.kernel.org> (raw)
In-Reply-To: <1513810644-78015-4-git-send-email-fenghua.yu@intel.com>
Commit-ID: a511e7935378ef1f321456a90beae2a2632d3d83
Gitweb: https://git.kernel.org/tip/a511e7935378ef1f321456a90beae2a2632d3d83
Author: Fenghua Yu <fenghua.yu@intel.com>
AuthorDate: Wed, 20 Dec 2017 14:57:21 -0800
Committer: Thomas Gleixner <tglx@linutronix.de>
CommitDate: Thu, 18 Jan 2018 09:33:30 +0100
x86/intel_rdt: Enumerate L2 Code and Data Prioritization (CDP) feature
L2 Code and Data Prioritization (CDP) is enumerated in
CPUID(EAX=0x10, ECX=0x2):ECX.bit2
Signed-off-by: Fenghua Yu <fenghua.yu@intel.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: "Ravi V Shankar" <ravi.v.shankar@intel.com>
Cc: "Tony Luck" <tony.luck@intel.com>
Cc: Vikas" <vikas.shivappa@intel.com>
Cc: Sai Praneeth" <sai.praneeth.prakhya@intel.com>
Cc: Reinette" <reinette.chatre@intel.com>
Link: https://lkml.kernel.org/r/1513810644-78015-4-git-send-email-fenghua.yu@intel.com
---
arch/x86/include/asm/cpufeatures.h | 1 +
arch/x86/kernel/cpu/scattered.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
index 25b9375..67bbfaa 100644
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -206,6 +206,7 @@
#define X86_FEATURE_RETPOLINE ( 7*32+12) /* Generic Retpoline mitigation for Spectre variant 2 */
#define X86_FEATURE_RETPOLINE_AMD ( 7*32+13) /* AMD Retpoline mitigation for Spectre variant 2 */
#define X86_FEATURE_INTEL_PPIN ( 7*32+14) /* Intel Processor Inventory Number */
+#define X86_FEATURE_CDP_L2 ( 7*32+15) /* Code and Data Prioritization L2 */
#define X86_FEATURE_AVX512_4VNNIW ( 7*32+16) /* AVX-512 Neural Network Instructions */
#define X86_FEATURE_AVX512_4FMAPS ( 7*32+17) /* AVX-512 Multiply Accumulation Single precision */
diff --git a/arch/x86/kernel/cpu/scattered.c b/arch/x86/kernel/cpu/scattered.c
index d0e6976..df4d8f7 100644
--- a/arch/x86/kernel/cpu/scattered.c
+++ b/arch/x86/kernel/cpu/scattered.c
@@ -26,6 +26,7 @@ static const struct cpuid_bit cpuid_bits[] = {
{ X86_FEATURE_CAT_L3, CPUID_EBX, 1, 0x00000010, 0 },
{ X86_FEATURE_CAT_L2, CPUID_EBX, 2, 0x00000010, 0 },
{ X86_FEATURE_CDP_L3, CPUID_ECX, 2, 0x00000010, 1 },
+ { X86_FEATURE_CDP_L2, CPUID_ECX, 2, 0x00000010, 2 },
{ X86_FEATURE_MBA, CPUID_EBX, 3, 0x00000010, 0 },
{ X86_FEATURE_HW_PSTATE, CPUID_EDX, 7, 0x80000007, 0 },
{ X86_FEATURE_CPB, CPUID_EDX, 9, 0x80000007, 0 },
next prev parent reply other threads:[~2018-01-18 8:39 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-12-20 22:57 [PATCH 0/6] x86/intel_rdt: Enable L2 CDP (Code and Data Prioritization) Fenghua Yu
2017-12-20 22:57 ` [PATCH 1/6] x86/intel_rdt: Classify /proc/cpuinfo flag bits and add missing bits in documentation Fenghua Yu
2018-01-18 8:37 ` [tip:x86/cache] x86/intel_rdt: Update documentation tip-bot for Fenghua Yu
2017-12-20 22:57 ` [PATCH 2/6] x86/intel_rdt: Add L2 Code and Data Prioritization (CDP) support in documentation Fenghua Yu
2018-01-18 8:37 ` [tip:x86/cache] x86/intel_rdt: Add L2CDP " tip-bot for Fenghua Yu
2017-12-20 22:57 ` [PATCH 3/6] x86/intel_rdt: Enumerate L2 Code and Data Prioritization (CDP) feature Fenghua Yu
2018-01-18 8:37 ` tip-bot for Fenghua Yu [this message]
2017-12-20 22:57 ` [PATCH 4/6] x86/intel_rdt: Add two new resources for L2 Code and Data Prioritization (CDP) Fenghua Yu
2017-12-20 23:22 ` Randy Dunlap
2017-12-20 23:26 ` Yu, Fenghua
2018-01-18 8:38 ` [tip:x86/cache] " tip-bot for Fenghua Yu
2017-12-20 22:57 ` [PATCH 5/6] x86/intel_rdt: Enable L2 CDP in MSR IA32_L2_QOS_CFG Fenghua Yu
2018-01-18 8:38 ` [tip:x86/cache] " tip-bot for Fenghua Yu
2017-12-20 22:57 ` [PATCH 6/6] x86/intel_rdt: Turn on/off L2 CDP in kernel parameter Fenghua Yu
2018-01-18 8:39 ` [tip:x86/cache] x86/intel_rdt: Add command line parameter to control L2_CDP tip-bot for Fenghua Yu
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