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From: "Chen, Yu C" <yu.c.chen@intel.com>
To: Reinette Chatre <reinette.chatre@intel.com>
Cc: <x86@kernel.org>, <linux-kernel@vger.kernel.org>,
	<tglx@kernel.org>, <bp@alien8.de>, <mingo@redhat.com>,
	<dave.hansen@linux.intel.com>, <hpa@zytor.com>,
	<dave.martin@arm.com>, <james.morse@arm.com>,
	<fenghuay@nvidia.com>, <babu.moger@amd.com>,
	<anil.keshavamurthy@broadcom.com>, <tony.luck@intel.com>,
	<chen.yu@linux.dev>
Subject: Re: [PATCH v4 1/6] x86/resctrl: Parse ACPI ERDT table and map RMDD domains by L3 cache ID
Date: Thu, 25 Jun 2026 22:33:24 +0800	[thread overview]
Message-ID: <040bb2fd-b8e3-47a9-b560-7d57ed6768cc@intel.com> (raw)
In-Reply-To: <a4198d0c-0b1d-480b-8a95-31b5caacd7c6@intel.com>

Hi Reinette,

On 6/25/2026 7:44 AM, Reinette Chatre wrote:
> Hi Chenyu,
> On 6/23/26 9:05 PM, Chen, Yu C wrote:
>> 1. At ACPI parse time , record the full CPU mask from CACD for each
>>     RMDD domain without checking online state or resolving L3 cache IDs.
> 
> ack.
> 
>>     Store a per-CPU pointer (erdt_cpu_domain[cpu]) for O(1) lookup.
> 
> Why is such optimization needed? From what I can tell this pointer is
> only accessed *once*. I do not think onlining a CPU is a hot path?
> Could this be simplified to just be a list of ERDT domains?
> 

Yes, we could store it in a linked list for later use, provided we add a
pointer in rdt_hw_l3_mon_domain to reference it.

>> 2. At CPU online time (resctrl_arch_online_cpu), validate that the CPU's
>>     CPUID-derived L3 ID is consistent with other CPUs in the same RMDD:
>>     - First online CPU in an RMDD establishes the L3 ID for that domain
>>       and inserts the domain into erdt_domain_xa keyed by L3 cache ID.
>>     - Subsequent CPUs must match. On mismatch, the CPU is refused from resctrl.
> 
> Considering that this now establishes 1:1 between RMDD and resctrl domain and that
> resctrl already maintains a list of domains, could the x86 arch specific monitoring
> domain (struct rdt_hw_l3_mon_domain) perhaps just point to the ERDT monitoring data
> for that domain instead of maintaining a separate array of domains? So, when x86 is
> requested to read monitoring data for a domain there would be no need to query an
> array for the ERDT domain info since the containing structure already has a pointer
> to it.
> 
> This may need more care to organize the ERDT per-domain monitoring data structure when
> considering the references to upcoming additions that are not clear to me at this time.
> 

I see. We could add a void *priv pointer to struct rdt_hw_l3_mon_domain.
During l3_mon_domain_setup(), we can assign this pointer to the 
corresponding
erdt_domain_info object from the previously created list.
Since each rdt_hw_l3_mon_domain instance is freed when the last CPU in 
its domain
goes offline, we need to keep the global list of struct erdt_domain_info 
objects
persistent at all times. Going forward, we may also need to add the same 
pointer
assignment to rdt_hw_ctrl_domain for the upcoming region-aware MBA changes.

>>
>> 3. erdt_mon_read() looks up erdt_domain_xa by hdr->id (L3 cache ID) as before,
>>     but the xarray is now populated lazily at CPU online time.
> 
> I do not see the need for an xarray. As new domains are created during CPU online their
> initialization can just point to the needed data, no?
> 

If we add the struct erdt_domain_info pointer to rdt_hw_l3_mon_domain, then
there is no need to maintain the xarray.

thanks,
Chenyu

  parent reply	other threads:[~2026-06-25 14:33 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-06-13  7:56 [PATCH v4 0/6] Introduce MMIO-based CMT access for Enhanced RDT Chen Yu
2026-06-13  7:56 ` [PATCH v4 1/6] x86/resctrl: Parse ACPI ERDT table and map RMDD domains by L3 cache ID Chen Yu
2026-06-18 23:37   ` Reinette Chatre
2026-06-22  9:07     ` Chen, Yu C
2026-06-22 21:28       ` Reinette Chatre
2026-06-23  6:29         ` Chen, Yu C
2026-06-23 11:43           ` Chen, Yu C
2026-06-23 16:46             ` Reinette Chatre
2026-06-24  4:05               ` Chen, Yu C
2026-06-24  6:04                 ` Chen, Yu C
2026-06-24 23:44                   ` Reinette Chatre
2026-06-24 23:58                     ` Luck, Tony
2026-06-25  0:24                       ` Reinette Chatre
2026-06-25 14:59                         ` Chen, Yu C
2026-06-25 14:33                     ` Chen, Yu C [this message]
2026-06-25 15:54                       ` Reinette Chatre
2026-06-13  7:57 ` [PATCH v4 2/6] x86/resctrl: Parse ACPI CMRC table Chen Yu
2026-06-13  7:57 ` [PATCH v4 3/6] x86/resctrl: Rename prev_msr to prev_mon_val Chen Yu
2026-06-18 23:39   ` Reinette Chatre
2026-06-22 12:42     ` Chen, Yu C
2026-06-22 21:29       ` Reinette Chatre
2026-06-23  7:48         ` Chen, Yu C
2026-06-23 16:47           ` Reinette Chatre
2026-06-24  6:16             ` Chen, Yu C
2026-06-13  7:57 ` [PATCH v4 4/6] x86/resctrl: Refactor the monitor read function Chen Yu
2026-06-13  7:57 ` [PATCH v4 5/6] fs/resctrl: Do not invoke smp_processor_id() in preemptible context Chen Yu
2026-06-13  7:57 ` [PATCH v4 6/6] x86/resctrl: Add support for L3 occupancy monitoring via RMID MMIO read Chen Yu
2026-06-18 23:40   ` Reinette Chatre
2026-06-22 14:09     ` Chen, Yu C
2026-06-22 21:30       ` Reinette Chatre
2026-06-23  5:00         ` Chen, Yu C
2026-06-23 16:48           ` Reinette Chatre
2026-06-24  9:00             ` Chen, Yu C
2026-06-24 23:44               ` Reinette Chatre

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