* [PATCH 1/4] dt-bindings: arm: aspeed: Add Intel AVCRP board
2026-10-02 16:32 [PATCH 0/4] arm: dts: aspeed: add Intel AVCRP and JNCRP BMC platforms Dawid Glazik
@ 2026-10-02 16:32 ` Dawid Glazik
2026-10-03 14:40 ` Krzysztof Kozlowski
2026-10-02 16:32 ` [PATCH 2/4] dt-bindings: arm: aspeed: Add Intel JNCRP board Dawid Glazik
` (2 subsequent siblings)
3 siblings, 1 reply; 10+ messages in thread
From: Dawid Glazik @ 2026-10-02 16:32 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Joel Stanley,
Andrew Jeffery
Cc: devicetree, linux-arm-kernel, linux-aspeed, linux-kernel,
dawid.glazik, maciej.lawniczak
Add a compatible string for Intel AVCRP BMC board.
Signed-off-by: Dawid Glazik <dawid.glazik@linux.intel.com>
---
Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml b/Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml
index 8ec7a3e74a21..2c8180e49b2f 100644
--- a/Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml
+++ b/Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml
@@ -106,6 +106,7 @@ properties:
- ibm,rainier-bmc
- ibm,sbp1-bmc
- ibm,system1-bmc
+ - intel,avcrp-bmc
- ibm,tacoma-bmc
- inventec,starscream-bmc
- inventec,transformer-bmc
--
2.43.0
^ permalink raw reply [flat|nested] 10+ messages in thread* Re: [PATCH 1/4] dt-bindings: arm: aspeed: Add Intel AVCRP board
2026-10-02 16:32 ` [PATCH 1/4] dt-bindings: arm: aspeed: Add Intel AVCRP board Dawid Glazik
@ 2026-10-03 14:40 ` Krzysztof Kozlowski
0 siblings, 0 replies; 10+ messages in thread
From: Krzysztof Kozlowski @ 2026-10-03 14:40 UTC (permalink / raw)
To: Dawid Glazik
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Joel Stanley,
Andrew Jeffery, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel, maciej.lawniczak
On Fri, Oct 02, 2026 at 06:32:42PM +0200, Dawid Glazik wrote:
> Add a compatible string for Intel AVCRP BMC board.
>
> Signed-off-by: Dawid Glazik <dawid.glazik@linux.intel.com>
> ---
> Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml b/Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml
> index 8ec7a3e74a21..2c8180e49b2f 100644
> --- a/Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml
> +++ b/Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml
> @@ -106,6 +106,7 @@ properties:
> - ibm,rainier-bmc
> - ibm,sbp1-bmc
> - ibm,system1-bmc
> + - intel,avcrp-bmc
Why breaking the order? I could imagine people adding to the end,
because they do not care yet still follows some logic. But this
counters any logic.
> - ibm,tacoma-bmc
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH 2/4] dt-bindings: arm: aspeed: Add Intel JNCRP board
2026-10-02 16:32 [PATCH 0/4] arm: dts: aspeed: add Intel AVCRP and JNCRP BMC platforms Dawid Glazik
2026-10-02 16:32 ` [PATCH 1/4] dt-bindings: arm: aspeed: Add Intel AVCRP board Dawid Glazik
@ 2026-10-02 16:32 ` Dawid Glazik
2026-10-03 14:41 ` Krzysztof Kozlowski
2026-10-02 16:32 ` [PATCH 3/4] ARM: dts: aspeed: add Intel AVCRP BMC Dawid Glazik
2026-10-02 16:32 ` [PATCH 4/4] ARM: dts: aspeed: add Intel JNCRP BMC Dawid Glazik
3 siblings, 1 reply; 10+ messages in thread
From: Dawid Glazik @ 2026-10-02 16:32 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Joel Stanley,
Andrew Jeffery
Cc: devicetree, linux-arm-kernel, linux-aspeed, linux-kernel,
dawid.glazik, maciej.lawniczak
Add a compatible string for Intel JNCRP BMC board.
Signed-off-by: Dawid Glazik <dawid.glazik@linux.intel.com>
---
Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml b/Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml
index 2c8180e49b2f..6f7d77efb30c 100644
--- a/Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml
+++ b/Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml
@@ -107,6 +107,7 @@ properties:
- ibm,sbp1-bmc
- ibm,system1-bmc
- intel,avcrp-bmc
+ - intel,jncrp-bmc
- ibm,tacoma-bmc
- inventec,starscream-bmc
- inventec,transformer-bmc
--
2.43.0
^ permalink raw reply [flat|nested] 10+ messages in thread* Re: [PATCH 2/4] dt-bindings: arm: aspeed: Add Intel JNCRP board
2026-10-02 16:32 ` [PATCH 2/4] dt-bindings: arm: aspeed: Add Intel JNCRP board Dawid Glazik
@ 2026-10-03 14:41 ` Krzysztof Kozlowski
0 siblings, 0 replies; 10+ messages in thread
From: Krzysztof Kozlowski @ 2026-10-03 14:41 UTC (permalink / raw)
To: Dawid Glazik
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Joel Stanley,
Andrew Jeffery, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel, maciej.lawniczak
On Fri, Oct 02, 2026 at 06:32:43PM +0200, Dawid Glazik wrote:
> Add a compatible string for Intel JNCRP BMC board.
>
> Signed-off-by: Dawid Glazik <dawid.glazik@linux.intel.com>
Squash patches. You don't even say anything useful in commit msg, just
repeat subject and diff, so what is the point of having it separate?
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH 3/4] ARM: dts: aspeed: add Intel AVCRP BMC
2026-10-02 16:32 [PATCH 0/4] arm: dts: aspeed: add Intel AVCRP and JNCRP BMC platforms Dawid Glazik
2026-10-02 16:32 ` [PATCH 1/4] dt-bindings: arm: aspeed: Add Intel AVCRP board Dawid Glazik
2026-10-02 16:32 ` [PATCH 2/4] dt-bindings: arm: aspeed: Add Intel JNCRP board Dawid Glazik
@ 2026-10-02 16:32 ` Dawid Glazik
2026-10-03 14:42 ` Krzysztof Kozlowski
2026-10-04 21:20 ` Andrew Lunn
2026-10-02 16:32 ` [PATCH 4/4] ARM: dts: aspeed: add Intel JNCRP BMC Dawid Glazik
3 siblings, 2 replies; 10+ messages in thread
From: Dawid Glazik @ 2026-10-02 16:32 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Joel Stanley,
Andrew Jeffery
Cc: devicetree, linux-arm-kernel, linux-aspeed, linux-kernel,
dawid.glazik, maciej.lawniczak
Add the initial AST2600 device tree for the Intel AVCRP BMC platform.
Signed-off-by: Dawid Glazik <dawid.glazik@linux.intel.com>
---
arch/arm/boot/dts/aspeed/Makefile | 1 +
.../dts/aspeed/aspeed-bmc-intel-avcrp.dts | 321 ++++++++++++++++++
2 files changed, 322 insertions(+)
create mode 100644 arch/arm/boot/dts/aspeed/aspeed-bmc-intel-avcrp.dts
diff --git a/arch/arm/boot/dts/aspeed/Makefile b/arch/arm/boot/dts/aspeed/Makefile
index 767f7c7652d5..ea4645ef9872 100644
--- a/arch/arm/boot/dts/aspeed/Makefile
+++ b/arch/arm/boot/dts/aspeed/Makefile
@@ -54,6 +54,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
aspeed-bmc-ibm-rainier-4u.dtb \
aspeed-bmc-ibm-sbp1.dtb \
aspeed-bmc-ibm-system1.dtb \
+ aspeed-bmc-intel-avcrp.dtb \
aspeed-bmc-intel-s2600wf.dtb \
aspeed-bmc-inspur-fp5280g2.dtb \
aspeed-bmc-inspur-nf5280m6.dtb \
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-intel-avcrp.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-intel-avcrp.dts
new file mode 100644
index 000000000000..ba0091689172
--- /dev/null
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-intel-avcrp.dts
@@ -0,0 +1,321 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+// Copyright 2026 Intel Corporation
+
+/dts-v1/;
+
+#include "aspeed-g6.dtsi"
+#include <dt-bindings/gpio/aspeed-gpio.h>
+
+/ {
+ model = "Intel AVCRP BMC";
+ compatible = "intel,avcrp-bmc", "aspeed,ast2600";
+
+ aliases {
+ serial4 = &uart5;
+ };
+
+ chosen {
+ bootargs = "console=ttyS4,115200n8";
+ };
+
+ memory@80000000 {
+ device_type = "memory";
+ reg = <0x80000000 0x40000000>;
+ };
+
+ reserved-memory {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ video_engine_memory: jpegbuffer {
+ size = <0x02000000>; /* 32M */
+ alignment = <0x01000000>;
+ compatible = "shared-dma-pool";
+ reusable;
+ };
+
+ video_memory: video {
+ size = <0x04000000>;
+ alignment = <0x01000000>;
+ compatible = "shared-dma-pool";
+ no-map;
+ };
+ };
+
+};
+
+&rtc {
+ status = "okay";
+};
+
+&fmc {
+ status = "okay";
+ flash@0 {
+ status = "okay";
+ m25p,fast-read;
+ label = "bmc";
+ spi-rx-bus-width = <4>;
+ spi-max-frequency = <50000000>;
+#include "openbmc-flash-layout-64.dtsi"
+ };
+};
+
+&uart1 {
+ status = "okay";
+};
+
+&uart3 {
+ status = "okay";
+};
+
+&uart4 {
+ status = "okay";
+};
+
+&uart5 {
+ status = "okay";
+};
+
+&uart_routing {
+ status = "okay";
+};
+
+&mdio1 {
+ status = "okay";
+
+ ethphy1: ethernet-phy@0 {
+ compatible = "ethernet-phy-id001c.c916";
+ reg = <0>;
+ reset-gpios = <&gpio0 ASPEED_GPIO(C, 1) GPIO_ACTIVE_LOW>;
+ reset-assert-us = <10000>;
+ reset-deassert-us = <50000>;
+ };
+};
+
+&mac1 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_rgmii2_default>;
+ clocks = <&syscon ASPEED_CLK_GATE_MAC2CLK>,
+ <&syscon ASPEED_CLK_MAC2RCLK>;
+ clock-names = "MACCLK", "RCLK";
+ phy-mode = "rgmii-id";
+ phy-handle = <ðphy1>;
+};
+
+&lpc {
+ lpc_snoop: lpc-snoop@80 {
+ snoop-ports = <0x80>;
+ status = "okay";
+ };
+};
+
+&i3c_global {
+ status = "okay";
+};
+
+&vhub {
+ status = "okay";
+};
+
+&video {
+ status = "okay";
+ memory-region = <&video_engine_memory>;
+};
+
+&gpio0 {
+ gpio-line-names =
+ /*A0-A7*/ "", "", "", "", "SMB_CPU_PIROM_SCL", "SMB_CPU_PIROM_SDA",
+ "SMB_IPMB_STBY_LVC3_SCL", "SMB_IPMB_STBY_LVC3_SDA",
+ /*B0-B7*/ "", "", "", "FM_CPU1_ERR2_LVT3_N",
+ "RGMII_BMC_RMM4_LVC3_R_MDC", "RGMII_BMC_RMM4_LVC3_R_MDIO",
+ "FM_BMC_BMCINIT_R", "FP_ID_LED_N",
+ /*C0-C7*/ "FM_FORCE_BMC_UPDATE_N", "RST_RGMII_PHYRST_N",
+ "FM_TPM_EN_PULSE", "", "", "",
+ "FM_CPU1_ERR0_LVT3_N", "FM_CPU1_ERR1_LVT3_N",
+ /*D0-D7*/ "CPU_ERR0", "CPU_ERR1", "CPU_ERR2", "PRDY_N",
+ "FM_SPD_SWITCH_CTRL_N", "", "", "",
+ /*E0-E7*/ "FM_SKT1_FAULT_LED", "FM_SKT0_FAULT_LED",
+ "CLK_50M_CKMNG_BMCB", "ID_BUTTON", "", "", "", "",
+ /*F0-F7*/ "", "FM_DUAL_PARTITION_MODE_N",
+ "FM_STANDALONE_MODE_N", "FM_4S_8S_N_MODE",
+ "FM_NODE_ID0", "FM_NODE_ID1", "", "",
+ /*G0-G7*/ "FM_SMB_BMC_NVME_LVC3_ALERT_N", "RST_BMC_HSBP_MUX_N",
+ "FP_LED_STATUS_GREEN_N", "FP_LED_STATUS_AMBER_N",
+ "PS_PWROK", "FM_PARTITION_SEL",
+ "FM_BMC_CPU_FBRK_OUT_R_N", "DBP_PRESENT_IN_R2_N",
+ /*H0-H7*/ "SGPIO_BMC_CLK_R", "SGPIO_BMC_LD_R",
+ "SGPIO_BMC_DOUT_R", "SGPIO_BMC_DIN",
+ "PLTRST_N", "CPU_CATERR", "", "",
+ /*I0-I7*/ "", "JTAG_ASD_TDI_R", "JTAG_ASD_TCK_R", "JTAG_ASD_TMS_R",
+ "JTAG_ASD_TDO", "FM_BMC_PWRBTN_OUT_R_N",
+ "FM_BMC_PWR_BTN_N", "",
+ /*J0-J7*/ "", "", "", "", "", "", "", "",
+ /*K0-K7*/ "", "", "", "", "", "", "", "",
+ /*L0-L7*/ "", "", "", "", "PREQ_N", "TCK_MUX_SEL", "", "",
+ /*M0-M7*/ "", "", "", "", "", "", "SPA_SOUT", "SPA_SIN",
+ /*N0-N7*/ "", "", "", "", "", "", "SPB_SOUT", "SPB_SIN",
+ /*O0-O7*/ "", "", "", "", "", "", "NMI_BUTTON", "SPEAKER_BMC_R",
+ /*P0-P7*/ "RESET_BUTTON", "RESET_OUT", "POWER_BUTTON", "POWER_OUT",
+ "", "", "", "LED_BMC_HB_LED_N",
+ /*Q0-Q7*/ "", "", "", "", "", "", "", "",
+ /*R0-R7*/ "", "", "", "", "", "", "", "",
+ /*S0-S7*/ "RST_BMC_PCIE_MUX_N", "FM_BMC_TRUST_N",
+ "FM_BMC_FRU_WP_N", "", "PWRGD_CPU0_AUXPWRGD",
+ "A_P3V_BAT_SCALED_EN", "REMOTE_DEBUG_ENABLE", "",
+ /*T0-T7*/ "", "", "", "", "", "", "", "",
+ /*U0-U7*/ "", "", "", "", "", "", "", "",
+ /*V0-V7*/ "SIO_S3", "SIO_S5", "", "SIO_ONCONTROL",
+ "SIO_POWER_GOOD", "", "", "",
+ /*W0-W7*/ "LPC_LAD0_ESPI_R_IO0", "LPC_LAD1_ESPI_R_IO1",
+ "LPC_LAD2_ESPI_R_IO2", "LPC_LAD3_ESPI_R_IO3",
+ "CLK_24M_66M_LPC0_ESPI_BMC", "LPC_LFRAME_N_ESPI_CS0_BMC_N",
+ "IRQ_LPC_SERIRQ_ESPI_ALERT_N", "RST_LPC_LRST_ESPI_RST_BMC_R_N",
+ /*X0-X7*/ "", "", "PCH_BMC_THERMTRIP", "", "", "", "", "",
+ /*Y0-Y7*/ "FM_BMC_CMOS_CLR_R_N", "", "FM_BMC_SAFS_EN",
+ "IRQ_SML1_PMBUS_BMC_ALERT_N", "SPI_BMC_BOOT_R_IO2",
+ "SPI_BMC_BOOT_R_IO3", "PU_SPI_BMC_BOOT_ABR",
+ "PU_SPI_BMC_BOOT_WP_N",
+ /*Z0-Z7*/ "", "", "", "HW_STRAP_5", "HW_STRAP_6", "HW_STRAP_7",
+ "HW_STRAP_2", "HW_STRAP_3";
+};
+
+&sgpiom0 {
+ ngpios = <128>;
+ bus-frequency = <2000000>;
+ status = "okay";
+ gpio-line-names =
+ /*A, 0-7*/ "CPU1_PRESENCE", "", "CPU1_THERMTRIP", "",
+ "CPU1_VRHOT", "", "H_CPU0_MON_FAIL_LVC1_N", "",
+ "CPU1_MEM_VRHOT", "", "CPU1_MEM_THERM_EVENT", "",
+ "FM_CPU0_PROC_ID0", "", "FM_CPU0_PROC_ID1", "",
+ /*B, 8-15*/ "CPU1_MISMATCH", "LED_CPU1_CH1_DIMM1_FAULT", "",
+ "LED_CPU1_CH1_DIMM2_FAULT", "CPU2_PRESENCE",
+ "LED_CPU1_CH2_DIMM1_FAULT", "CPU2_THERMTRIP",
+ "LED_CPU1_CH2_DIMM2_FAULT", "CPU2_VRHOT",
+ "LED_CPU1_CH3_DIMM1_FAULT", "H_CPU1_MON_FAIL_LVC1_N",
+ "LED_CPU1_CH3_DIMM2_FAULT", "CPU2_MEM_VRHOT",
+ "LED_CPU1_CH4_DIMM1_FAULT", "CPU2_MEM_THERM_EVENT",
+ "LED_CPU1_CH4_DIMM2_FAULT",
+ /*C, 16-23*/ "FM_CPU1_PROC_ID0", "LED_CPU1_CH5_DIMM1_FAULT",
+ "FM_CPU1_PROC_ID1", "LED_CPU1_CH5_DIMM2_FAULT",
+ "CPU2_MISMATCH", "LED_CPU1_CH6_DIMM1_FAULT", "",
+ "LED_CPU1_CH6_DIMM2_FAULT", "", "LED_FAN1_FAULT", "",
+ "LED_FAN2_FAULT", "", "LED_FAN3_FAULT", "",
+ "LED_FAN4_FAULT",
+ /*D, 24-31*/ "", "LED_FAN5_FAULT", "", "LED_FAN6_FAULT", "",
+ "LED_FAN7_FAULT", "", "LED_FAN8_FAULT", "",
+ "LED_CPU2_CH1_DIMM1_FAULT", "", "LED_CPU2_CH1_DIMM2_FAULT",
+ "", "LED_CPU2_CH2_DIMM1_FAULT", "",
+ "LED_CPU2_CH2_DIMM2_FAULT",
+ /*E, 32-39*/ "", "LED_CPU2_CH3_DIMM1_FAULT", "",
+ "LED_CPU2_CH3_DIMM2_FAULT", "", "LED_CPU2_CH4_DIMM1_FAULT",
+ "", "LED_CPU2_CH4_DIMM2_FAULT", "",
+ "LED_CPU2_CH5_DIMM1_FAULT", "", "LED_CPU2_CH5_DIMM2_FAULT",
+ "", "LED_CPU2_CH6_DIMM1_FAULT", "CPU1_CPLD_CRC_ERROR",
+ "LED_CPU2_CH6_DIMM2_FAULT",
+ /*F, 40-47*/ "CPU2_CPLD_CRC_ERROR", "", "CPU1_CATERR_IERR", "",
+ "CPU1_CATERR_MCERR", "", "CPU2_CATERR_IERR", "",
+ "CPU2_CATERR_MCERR", "", "", "", "", "", "", "",
+ /*G, 48-55*/ "MAIN_PLD_MINOR_REV_BIT0", "", "MAIN_PLD_MINOR_REV_BIT1", "",
+ "MAIN_PLD_MINOR_REV_BIT2", "", "MAIN_PLD_MINOR_REV_BIT3", "",
+ "MAIN_PLD_MAJOR_REV_BIT0", "", "MAIN_PLD_MAJOR_REV_BIT1", "",
+ "MAIN_PLD_MAJOR_REV_BIT2", "", "MAIN_PLD_MAJOR_REV_BIT3", "",
+ /*H, 56-63*/ "", "", "WMEMX_PWR_FLT", "", "WCPUX_MEM_PWR_FLT", "",
+ "PWRGD_P3V3_FF", "", "WPSU_PWR_FLT", "", "", "",
+ "", "", "WPCH_PWR_FLT", "",
+ /*I, 64-71*/ "FM_CPU0_PKGID0", "LED_CPU1_CH7_DIMM1_FAULT",
+ "FM_CPU0_PKGID1", "LED_CPU1_CH7_DIMM2_FAULT",
+ "FM_CPU0_PKGID2", "LED_CPU1_CH8_DIMM1_FAULT",
+ "H_CPU0_MEMTRIP_LVC1_N", "LED_CPU1_CH8_DIMM2_FAULT",
+ "FM_CPU1_PKGID0", "LED_CPU2_CH7_DIMM1_FAULT",
+ "FM_CPU1_PKGID1", "LED_CPU2_CH7_DIMM2_FAULT",
+ "FM_CPU1_PKGID2", "LED_CPU2_CH8_DIMM1_FAULT",
+ "H_CPU1_MEMTRIP_LVC1_N", "LED_CPU2_CH8_DIMM2_FAULT",
+ /*J, 72-79*/ "", "", "", "", "", "", "", "",
+ "", "", "", "", "", "", "", "",
+ /*K, 80-87*/ "FM_BOARD_REV_ID0", "LED_CPU0_CH9_DIMM1_FAULT",
+ "FM_BOARD_REV_ID1", "LED_CPU0_CH9_DIMM2_FAULT",
+ "FM_BOARD_REV_ID2", "LED_CPU0_CH10_DIMM1_FAULT",
+ "FM_BOARD_SKU_ID0", "LED_CPU0_CH10_DIMM2_FAULT",
+ "FM_BOARD_SKU_ID1", "LED_CPU0_CH11_DIMM1_FAULT",
+ "FM_BOARD_SKU_ID2", "LED_CPU0_CH11_DIMM2_FAULT",
+ "FM_BOARD_SKU_ID3", "LED_CPU0_CH12_DIMM1_FAULT",
+ "FM_BOARD_SKU_ID4", "LED_CPU0_CH12_DIMM2_FAULT",
+ /*L, 88-95*/ "FM_BOARD_SKU_ID5", "LED_CPU1_CH9_DIMM1_FAULT",
+ "FM_BMC_VAL_EN", "LED_CPU1_CH9_DIMM2_FAULT",
+ "FM_SERIAL_BOOT", "LED_CPU1_CH10_DIMM1_FAULT", "",
+ "LED_CPU1_CH10_DIMM2_FAULT", "S0_PWROK",
+ "LED_CPU1_CH11_DIMM1_FAULT", "", "LED_CPU1_CH11_DIMM2_FAULT",
+ "", "LED_CPU1_CH12_DIMM1_FAULT", "",
+ "LED_CPU1_CH12_DIMM2_FAULT",
+ /*M, 96-103*/ "", "FM_SURPRISE_RESET_N", "",
+ "FM_CPU1_INTR_CLK_CONFDONE_N", "", "FM_GLOBAL_RESET_N",
+ "FM_1200VA_OC", "BMC_BOOT_DONE", "", "IRQ_BMC_CPU_NMI_P0",
+ "", "IRQ_BMC_CPU_NMI_P1", "", "", "", "",
+ /*N, 104-111*/ "", "", "", "", "", "", "", "",
+ "", "", "", "", "", "", "", "",
+ /*O, 112-119*/ "R1S_PRESENCE", "", "", "", "", "", "", "",
+ "", "", "", "", "", "", "", "",
+ /*P, 120-127*/ "", "", "", "", "", "", "", "",
+ "", "", "", "", "", "", "", "";
+};
+
+&kcs3 {
+ aspeed,lpc-io-reg = <0xCA2>;
+ status = "okay";
+};
+
+&i3c2 {
+ status = "okay";
+ i2c-scl-hz = <400000>;
+ mctp-controller;
+};
+
+&i2c5 {
+ multi-master;
+ status = "okay";
+};
+
+&i2c6 {
+ multi-master;
+ status = "okay";
+};
+
+&i2c7 {
+ multi-master;
+ status = "okay";
+};
+
+&i2c8 {
+ multi-master;
+ status = "okay";
+};
+
+&i2c9 {
+ multi-master;
+ status = "okay";
+};
+
+&i2c10 {
+ status = "okay";
+};
+
+&i2c11 {
+ status = "okay";
+};
+
+&i2c12 {
+ multi-master;
+ status = "okay";
+};
+
+&i2c13 {
+ multi-master;
+ status = "okay";
+};
+
+&i2c15 {
+ status = "okay";
+};
--
2.43.0
^ permalink raw reply [flat|nested] 10+ messages in thread* Re: [PATCH 3/4] ARM: dts: aspeed: add Intel AVCRP BMC
2026-10-02 16:32 ` [PATCH 3/4] ARM: dts: aspeed: add Intel AVCRP BMC Dawid Glazik
@ 2026-10-03 14:42 ` Krzysztof Kozlowski
2026-10-04 21:20 ` Andrew Lunn
1 sibling, 0 replies; 10+ messages in thread
From: Krzysztof Kozlowski @ 2026-10-03 14:42 UTC (permalink / raw)
To: Dawid Glazik
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Joel Stanley,
Andrew Jeffery, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel, maciej.lawniczak
On Fri, Oct 02, 2026 at 06:32:44PM +0200, Dawid Glazik wrote:
> Add the initial AST2600 device tree for the Intel AVCRP BMC platform.
>
> Signed-off-by: Dawid Glazik <dawid.glazik@linux.intel.com>
> ---
> arch/arm/boot/dts/aspeed/Makefile | 1 +
> .../dts/aspeed/aspeed-bmc-intel-avcrp.dts | 321 ++++++++++++++++++
> 2 files changed, 322 insertions(+)
> create mode 100644 arch/arm/boot/dts/aspeed/aspeed-bmc-intel-avcrp.dts
>
> diff --git a/arch/arm/boot/dts/aspeed/Makefile b/arch/arm/boot/dts/aspeed/Makefile
> index 767f7c7652d5..ea4645ef9872 100644
> --- a/arch/arm/boot/dts/aspeed/Makefile
> +++ b/arch/arm/boot/dts/aspeed/Makefile
> @@ -54,6 +54,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
> aspeed-bmc-ibm-rainier-4u.dtb \
> aspeed-bmc-ibm-sbp1.dtb \
> aspeed-bmc-ibm-system1.dtb \
> + aspeed-bmc-intel-avcrp.dtb \
> aspeed-bmc-intel-s2600wf.dtb \
> aspeed-bmc-inspur-fp5280g2.dtb \
> aspeed-bmc-inspur-nf5280m6.dtb \
> diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-intel-avcrp.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-intel-avcrp.dts
> new file mode 100644
> index 000000000000..ba0091689172
> --- /dev/null
> +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-intel-avcrp.dts
> @@ -0,0 +1,321 @@
> +// SPDX-License-Identifier: GPL-2.0-or-later
> +// Copyright 2026 Intel Corporation
> +
> +/dts-v1/;
> +
> +#include "aspeed-g6.dtsi"
> +#include <dt-bindings/gpio/aspeed-gpio.h>
> +
> +/ {
> + model = "Intel AVCRP BMC";
> + compatible = "intel,avcrp-bmc", "aspeed,ast2600";
> +
> + aliases {
> + serial4 = &uart5;
> + };
> +
> + chosen {
> + bootargs = "console=ttyS4,115200n8";
We moved to stdout property years ago.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 10+ messages in thread* Re: [PATCH 3/4] ARM: dts: aspeed: add Intel AVCRP BMC
2026-10-02 16:32 ` [PATCH 3/4] ARM: dts: aspeed: add Intel AVCRP BMC Dawid Glazik
2026-10-03 14:42 ` Krzysztof Kozlowski
@ 2026-10-04 21:20 ` Andrew Lunn
1 sibling, 0 replies; 10+ messages in thread
From: Andrew Lunn @ 2026-10-04 21:20 UTC (permalink / raw)
To: Dawid Glazik
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Joel Stanley,
Andrew Jeffery, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel, maciej.lawniczak
> +&mdio1 {
> + status = "okay";
> +
> + ethphy1: ethernet-phy@0 {
> + compatible = "ethernet-phy-id001c.c916";
> + reg = <0>;
> + reset-gpios = <&gpio0 ASPEED_GPIO(C, 1) GPIO_ACTIVE_LOW>;
> + reset-assert-us = <10000>;
> + reset-deassert-us = <50000>;
> + };
> +};
> +
> +&mac1 {
> + status = "okay";
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_rgmii2_default>;
> + clocks = <&syscon ASPEED_CLK_GATE_MAC2CLK>,
> + <&syscon ASPEED_CLK_MAC2RCLK>;
> + clock-names = "MACCLK", "RCLK";
> + phy-mode = "rgmii-id";
> + phy-handle = <ðphy1>;
> +};
Oh, wow. Somebody actually got RGMII delays correct on the first try
for an aspeed board.
For these two nodes only:
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Andrew
^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH 4/4] ARM: dts: aspeed: add Intel JNCRP BMC
2026-10-02 16:32 [PATCH 0/4] arm: dts: aspeed: add Intel AVCRP and JNCRP BMC platforms Dawid Glazik
` (2 preceding siblings ...)
2026-10-02 16:32 ` [PATCH 3/4] ARM: dts: aspeed: add Intel AVCRP BMC Dawid Glazik
@ 2026-10-02 16:32 ` Dawid Glazik
2026-10-04 21:21 ` Andrew Lunn
3 siblings, 1 reply; 10+ messages in thread
From: Dawid Glazik @ 2026-10-02 16:32 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Joel Stanley,
Andrew Jeffery
Cc: devicetree, linux-arm-kernel, linux-aspeed, linux-kernel,
dawid.glazik, maciej.lawniczak
Add the initial AST2600 device tree for the Intel JNCRP BMC platform.
Signed-off-by: Dawid Glazik <dawid.glazik@linux.intel.com>
---
arch/arm/boot/dts/aspeed/Makefile | 1 +
.../dts/aspeed/aspeed-bmc-intel-jncrp.dts | 257 ++++++++++++++++++
2 files changed, 258 insertions(+)
create mode 100644 arch/arm/boot/dts/aspeed/aspeed-bmc-intel-jncrp.dts
diff --git a/arch/arm/boot/dts/aspeed/Makefile b/arch/arm/boot/dts/aspeed/Makefile
index ea4645ef9872..f0d665b3dcee 100644
--- a/arch/arm/boot/dts/aspeed/Makefile
+++ b/arch/arm/boot/dts/aspeed/Makefile
@@ -55,6 +55,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
aspeed-bmc-ibm-sbp1.dtb \
aspeed-bmc-ibm-system1.dtb \
aspeed-bmc-intel-avcrp.dtb \
+ aspeed-bmc-intel-jncrp.dtb \
aspeed-bmc-intel-s2600wf.dtb \
aspeed-bmc-inspur-fp5280g2.dtb \
aspeed-bmc-inspur-nf5280m6.dtb \
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-intel-jncrp.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-intel-jncrp.dts
new file mode 100644
index 000000000000..87e5e1ce6594
--- /dev/null
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-intel-jncrp.dts
@@ -0,0 +1,257 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+// Copyright 2025 Intel Corporation
+
+/dts-v1/;
+
+#include "aspeed-g6.dtsi"
+#include <dt-bindings/gpio/aspeed-gpio.h>
+
+/ {
+ model = "Intel JNCRP BMC";
+ compatible = "intel,jncrp-bmc", "aspeed,ast2600";
+
+ aliases {
+ serial4 = &uart5;
+ };
+
+ chosen {
+ bootargs = "console=ttyS4,115200n8";
+ };
+
+ memory@80000000 {
+ device_type = "memory";
+ reg = <0x80000000 0x40000000>;
+ };
+};
+
+&rtc {
+ status = "okay";
+};
+
+&fmc {
+ status = "okay";
+ flash@0 {
+ status = "okay";
+ m25p,fast-read;
+ label = "bmc";
+ spi-rx-bus-width = <4>;
+ spi-max-frequency = <50000000>;
+#include "openbmc-flash-layout-64.dtsi"
+ };
+};
+
+&uart1 {
+ status = "okay";
+};
+
+&uart5 {
+ status = "okay";
+};
+
+&mdio1 {
+ status = "okay";
+
+ ethphy1: ethernet-phy@0 {
+ compatible = "ethernet-phy-id001c.c916";
+ reg = <0>;
+ reset-gpios = <&gpio0 ASPEED_GPIO(C, 1) GPIO_ACTIVE_LOW>;
+ reset-assert-us = <10000>;
+ reset-deassert-us = <50000>;
+ };
+};
+
+&mac1 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_rgmii2_default>;
+ clocks = <&syscon ASPEED_CLK_GATE_MAC2CLK>,
+ <&syscon ASPEED_CLK_MAC2RCLK>;
+ clock-names = "MACCLK", "RCLK";
+ phy-mode = "rgmii-id";
+ phy-handle = <ðphy1>;
+};
+
+&lpc {
+ lpc_snoop: lpc-snoop@80 {
+ snoop-ports = <0x80>;
+ status = "okay";
+ };
+};
+
+&gpio0 {
+ status = "okay";
+ gpio-line-names =
+ /*A0-A7*/ "", "", "", "", "", "", "", "",
+ /*B0-B7*/ "PWRGD_AUX_PWRGD_BMC_CPU", "", "", "", "", "", "",
+ "FP_ID_LED_N",
+ /*C0-C7*/ "FM_FORCE_BMC_UPDATE_N", "RST_RGMII_PHYRST_N",
+ "FM_TPM_EN_PULSE", "", "", "",
+ "DBP_HOOK3_CPU_FBRK_OUT_R_N", "DBP_PRSNT_IN_N",
+ /*D0-D7*/ "CPU_ERR0_N", "CPU_ERR1_N", "CPU_ERR2_N", "DBP_ASD_BMC_PRDY_N",
+ "FM_SPD_SWITCH_CTRL_N", "", "", "",
+ /*E0-E7*/ "", "", "", "ID_BUTTON", "", "", "", "",
+ /*F0-F7*/ "", "", "FM_AGGREGATOR_MODE_N", "", "", "",
+ "FP_LED_STATUS_GREEN_R_N", "FP_LED_STATUS_AMBER_R_N",
+ /*G0-G7*/ "", "", "", "", "", "", "", "",
+ /*H0-H7*/ "", "", "", "", "", "", "", "",
+ /*I0-I7*/ "", "", "", "", "", "", "", "",
+ /*J0-J7*/ "", "", "", "", "", "", "", "",
+ /*K0-K7*/ "", "", "", "", "", "", "", "",
+ /*L0-L7*/ "", "", "", "", "PREQ_N", "FM_P3V3_SW_ENA", "", "",
+ /*M0-M7*/ "", "", "", "", "", "", "", "",
+ /*N0-N7*/ "", "", "", "", "", "", "", "",
+ /*O0-O7*/ "", "", "", "", "", "", "NMI_BUTTON", "",
+ /*P0-P7*/ "RESET_BUTTON", "RESET_OUT", "POWER_BUTTON", "POWER_OUT",
+ "", "", "", "LED_BMC_HB_LED_N",
+ /*Q0-Q7*/ "", "", "", "", "", "", "", "",
+ /*R0-R7*/ "", "", "", "", "", "", "", "",
+ /*S0-S7*/ "CPU_CATERR_IERR_N", "CPU_CATERR_MCERR_N", "FM_BMC_FRU_WP_N",
+ "FM_INTRUSION_CABLE_PRES_N", "PWRGD_CPU_AUXPWRGD",
+ "FM_P3V_BAT_SCALED_EN", "REMOTE_DEBUG_ENABLE", "",
+ /*T0-T7*/ "", "", "", "", "", "", "", "",
+ /*U0-U7*/ "", "", "", "", "", "", "", "",
+ /*V0-V7*/ "SIO_S3", "SIO_S5", "", "SIO_ONCONTROL",
+ "SIO_POWER_GOOD", "", "", "",
+ /*W0-W7*/ "", "", "", "", "", "", "", "",
+ /*X0-X7*/ "", "", "POST_COMPLETE", "", "", "", "", "",
+ /*Y0-Y7*/ "FM_BMC_CMOS_CLR_R_N", "PLTRST_N", "FM_BMC_SAFS_EN",
+ "IRQ_PSU_ALERT_LVC3_N", "", "", "", "",
+ /*Z0-Z7*/ "", "", "", "", "", "", "", "";
+
+ spd-switch-cpu-hog {
+ gpio-hog;
+ gpios = <ASPEED_GPIO(D, 4) GPIO_ACTIVE_HIGH>;
+ output-low;
+ };
+};
+
+&sgpiom0 {
+ ngpios = <128>;
+ bus-frequency = <2000000>;
+ status = "okay";
+ gpio-line-names =
+ /*A, 0-7*/ "CPU0_VRHOT_N", "LED_POSTCODE_0_LSB",
+ "CPU0_THERMTRIP_N", "LED_POSTCODE_1",
+ "CPU0_MEMTRIP_N", "LED_POSTCODE_2",
+ "CPU0_MEM_VRHOT_N", "LED_POSTCODE_3",
+ "CPU0_MEM_HOT_N", "LED_POSTCODE_4",
+ "CPU0_MON_FAIL_N", "LED_POSTCODE_5",
+ "CPU1_VRHOT_N", "LED_POSTCODE_6",
+ "CPU1_THERMTRIP_N", "LED_POSTCODE_7_MSB",
+ /*B, 8-15*/ "CPU1_MEMTRIP_N", "FM_ASYNC_WARM_RESET_REQ",
+ "CPU1_MEM_VRHOT_N", "HPM_FRU_READ_DONE",
+ "CPU1_MEM_HOT_N", "FM_ASYNC_GLOBAL_RESET_REQ",
+ "CPU1_MON_FAIL_N", "BMC_BOOT_DONE",
+ "CPU2_VRHOT_N", "NMI_OUT",
+ "CPU2_THERMTRIP_N", "AGGREGATOR_MODE",
+ "CPU2_MEMTRIP_N", "RST_I3C_PCIE_HUB_N",
+ "CPU2_MEM_VRHOT_N", "",
+ /*C, 16-23*/ "CPU2_MEM_HOT_N", "HPM0_PRESENT",
+ "CPU2_MON_FAIL_N", "HPM1_PRESENT",
+ "CPU3_VRHOT_N", "HPM2_PRESENT",
+ "CPU3_THERMTRIP_N", "HPM3_PRESENT",
+ "CPU3_MEMTRIP_N", "HPM0_SOURCE_TO_DESTINATION_FAIL",
+ "CPU3_MEM_VRHOT_N", "HPM1_SOURCE_TO_DESTINATION_FAIL",
+ "CPU3_MEM_HOT_N", "HPM2_SOURCE_TO_DESTINATION_FAIL",
+ "CPU3_MON_FAIL_N", "HPM3_SOURCE_TO_DESTINATION_FAIL",
+ /*D, 24-31*/ "FM_BMC_VAL_EN", "HPM0_FRU_VALID",
+ "FM_SERIAL_BOOT", "HPM1_FRU_VALID",
+ "FM_INTRUSION_CABLE_PRES_N", "HPM2_FRU_VALID",
+ "USB_OC_P2_3_N", "HPM3_FRU_VALID",
+ "FM_SYSTEM_COOLING_MODE0", "FM_S2D_DISCOVERY_DONE",
+ "FM_SYSTEM_COOLING_MODE1", "", "", "", "", "",
+ /*E, 32-39*/ "DBP_PMODE_S0_PWROK", "", "DBP_PMODE_PLTRST", "",
+ "DBP_PMODE_GLOBALRESET", "", "DBP_PMODE_CPU_PWRGD", "",
+ "FM_SMBUS_RDY", "", "FM_LEAK_DETECTION", "",
+ "FM_LEAK_CBL_PRSNT_N", "", "FM_LEAK_CBL_FAULT_N", "",
+ /*F, 40-47*/ "CPU0_SKTOCC1_N", "CPU0_SKT_FAULT_LED",
+ "CPU0_SKTOCC2_N", "CPU1_SKT_FAULT_LED",
+ "CPU0_MISMATCH", "CPU2_SKT_FAULT_LED",
+ "CPU1_SKTOCC1_N", "CPU3_SKT_FAULT_LED",
+ "CPU1_SKTOCC2_N", "", "CPU1_MISMATCH", "",
+ "CPU2_SKTOCC1_N", "", "CPU2_SKTOCC2_N", "",
+ /*G, 48-55*/ "CPU2_MISMATCH", "", "CPU3_SKTOCC1_N", "",
+ "CPU3_SKTOCC2_N", "", "CPU3_MISMATCH", "",
+ "HPM0_PRSNT_N", "", "HPM1_PRSNT_N", "",
+ "HPM2_PRSNT_N", "", "HPM3_PRSNT_N", "",
+ /*H, 56-63*/ "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "",
+ /*I, 64-71*/ "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "",
+ /*J, 72-79*/ "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "",
+ /*K, 80-87*/ "FM_BOARD_REV_ID0", "", "FM_BOARD_REV_ID1", "",
+ "FM_BOARD_REV_ID2", "", "FM_BOARD_SKU_ID0", "",
+ "FM_BOARD_SKU_ID1", "", "FM_BOARD_SKU_ID2", "",
+ "FM_BOARD_SKU_ID3", "", "FM_BOARD_SKU_ID4", "",
+ /*L, 88-95*/ "FM_BOARD_SKU_ID5", "", "FM_BOARD_SKU_ID6", "",
+ "FM_BOARD_SKU_ID7", "", "", "", "", "", "", "",
+ "", "", "", "",
+ /*M, 96-103*/ "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "",
+ /*N, 104-111*/ "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "",
+ /*O, 112-119*/ "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "",
+ /*P, 120-127*/ "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "";
+};
+
+&i3c_global {
+ status = "okay";
+};
+
+&i3c1 {
+ status = "okay";
+ mctp-controller;
+ i2c-scl-hz = <1000000>;
+};
+
+&i2c4 {
+ status = "okay";
+};
+
+&i2c5 {
+ multi-master;
+ status = "okay";
+};
+
+&i2c6 {
+ status = "okay";
+};
+
+&i2c7 {
+ multi-master;
+ status = "okay";
+};
+
+&i2c8 {
+ multi-master;
+ status = "okay";
+};
+
+&i2c9 {
+ multi-master;
+ status = "okay";
+};
+
+&i2c10 {
+ multi-master;
+ status = "okay";
+};
+
+&i2c11 {
+ status = "okay";
+};
+
+&i2c12 {
+ multi-master;
+ status = "okay";
+};
+
+&i2c13 {
+ multi-master;
+ status = "okay";
+};
+
+&i2c14 {
+ status = "okay";
+};
+
+&i2c15 {
+ multi-master;
+ status = "okay";
+};
--
2.43.0
^ permalink raw reply [flat|nested] 10+ messages in thread* Re: [PATCH 4/4] ARM: dts: aspeed: add Intel JNCRP BMC
2026-10-02 16:32 ` [PATCH 4/4] ARM: dts: aspeed: add Intel JNCRP BMC Dawid Glazik
@ 2026-10-04 21:21 ` Andrew Lunn
0 siblings, 0 replies; 10+ messages in thread
From: Andrew Lunn @ 2026-10-04 21:21 UTC (permalink / raw)
To: Dawid Glazik
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Joel Stanley,
Andrew Jeffery, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel, maciej.lawniczak
> +&mdio1 {
> + status = "okay";
> +
> + ethphy1: ethernet-phy@0 {
> + compatible = "ethernet-phy-id001c.c916";
> + reg = <0>;
> + reset-gpios = <&gpio0 ASPEED_GPIO(C, 1) GPIO_ACTIVE_LOW>;
> + reset-assert-us = <10000>;
> + reset-deassert-us = <50000>;
> + };
> +};
> +
> +&mac1 {
> + status = "okay";
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_rgmii2_default>;
> + clocks = <&syscon ASPEED_CLK_GATE_MAC2CLK>,
> + <&syscon ASPEED_CLK_MAC2RCLK>;
> + clock-names = "MACCLK", "RCLK";
> + phy-mode = "rgmii-id";
> + phy-handle = <ðphy1>;
> +};
For these two nodes only:
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Andrew
^ permalink raw reply [flat|nested] 10+ messages in thread