[PATCH] crypto: ux500/hash: Add empty export and import

[PATCH] crypto: ux500/hash: Add empty export and import

[Kamil Konieczny]

Crypto framework will require async hash export/import, so add empty
functions to prevent OOPS.

Signed-off-by: Kamil Konieczny <k.konieczny@partner.samsung.com>
---
 drivers/crypto/ux500/hash/hash_core.c | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/drivers/crypto/ux500/hash/hash_core.c b/drivers/crypto/ux500/hash/hash_core.c
index 9acccad26928..2d0a677bcc76 100644
--- a/drivers/crypto/ux500/hash/hash_core.c
+++ b/drivers/crypto/ux500/hash/hash_core.c
@@ -1403,6 +1403,16 @@ static int ahash_sha256_digest(struct ahash_request *req)
 	return ret1 ? ret1 : ret2;
 }
 
+static int ahash_noimport(struct ahash_request *req, const void *in)
+{
+	return -ENOSYS;
+}
+
+static int ahash_noexport(struct ahash_request *req, void *out)
+{
+	return -ENOSYS;
+}
+
 static int hmac_sha1_init(struct ahash_request *req)
 {
 	struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
@@ -1507,6 +1517,8 @@ static struct hash_algo_template hash_algs[] = {
 			.update = ahash_update,
 			.final = ahash_final,
 			.digest = ahash_sha1_digest,
+			.export = ahash_noexport,
+			.import = ahash_noimport,
 			.halg.digestsize = SHA1_DIGEST_SIZE,
 			.halg.statesize = sizeof(struct hash_ctx),
 			.halg.base = {
@@ -1529,6 +1541,8 @@ static struct hash_algo_template hash_algs[] = {
 			.update	= ahash_update,
 			.final = ahash_final,
 			.digest = ahash_sha256_digest,
+			.export = ahash_noexport,
+			.import = ahash_noimport,
 			.halg.digestsize = SHA256_DIGEST_SIZE,
 			.halg.statesize = sizeof(struct hash_ctx),
 			.halg.base = {
@@ -1553,6 +1567,8 @@ static struct hash_algo_template hash_algs[] = {
 			.final = ahash_final,
 			.digest = hmac_sha1_digest,
 			.setkey = hmac_sha1_setkey,
+			.export = ahash_noexport,
+			.import = ahash_noimport,
 			.halg.digestsize = SHA1_DIGEST_SIZE,
 			.halg.statesize = sizeof(struct hash_ctx),
 			.halg.base = {
@@ -1577,6 +1593,8 @@ static struct hash_algo_template hash_algs[] = {
 			.final = ahash_final,
 			.digest = hmac_sha256_digest,
 			.setkey = hmac_sha256_setkey,
+			.export = ahash_noexport,
+			.import = ahash_noimport,
 			.halg.digestsize = SHA256_DIGEST_SIZE,
 			.halg.statesize = sizeof(struct hash_ctx),
 			.halg.base = {
-- 
2.15.0

Re: [PATCH] crypto: ux500/hash: Add empty export and import

[Linus Walleij]

On Tue, Jan 16, 2018 at 5:32 PM, Kamil Konieczny
<k.konieczny@partner.samsung.com> wrote:

> Crypto framework will require async hash export/import, so add empty
> functions to prevent OOPS.
>
> Signed-off-by: Kamil Konieczny <k.konieczny@partner.samsung.com>

Acked-by: Linus Walleij <linus.walleij@linaro.org>

But why isn't the framework code just checking the vtable for NULL?

if (foo->fp)
    foo->fp(bar);

Yours,
Linus Walleij

Re: [PATCH] crypto: ux500/hash: Add empty export and import

[Kamil Konieczny]

On 18.01.2018 11:06, Linus Walleij wrote:
> On Tue, Jan 16, 2018 at 5:32 PM, Kamil Konieczny
> <k.konieczny@partner.samsung.com> wrote:
> 
>> Crypto framework will require async hash export/import, so add empty
>> functions to prevent OOPS.
>>
>> Signed-off-by: Kamil Konieczny <k.konieczny@partner.samsung.com>
> 
> Acked-by: Linus Walleij <linus.walleij@linaro.org>
> 
> But why isn't the framework code just checking the vtable for NULL?
> 
> if (foo->fp)
>     foo->fp(bar);

This will be inefficient, 
it should be checked once at ahash alg register,
or with the old method by using wrapper

-- 
Best regards,
Kamil Konieczny
Samsung R&D Institute Poland

Re: [PATCH] crypto: ux500/hash: Add empty export and import

[Kamil Konieczny]

Please drop this as I will resend it as part of patchset.

On 16.01.2018 17:32, Kamil Konieczny wrote:
> Crypto framework will require async hash export/import, so add empty
> functions to prevent OOPS.
> 
> Signed-off-by: Kamil Konieczny <k.konieczny@partner.samsung.com>
> ---
>  drivers/crypto/ux500/hash/hash_core.c | 18 ++++++++++++++++++
>  1 file changed, 18 insertions(+)
> 
> diff --git a/drivers/crypto/ux500/hash/hash_core.c b/drivers/crypto/ux500/hash/hash_core.c
> index 9acccad26928..2d0a677bcc76 100644
> --- a/drivers/crypto/ux500/hash/hash_core.c
> +++ b/drivers/crypto/ux500/hash/hash_core.c
> @@ -1403,6 +1403,16 @@ static int ahash_sha256_digest(struct ahash_request *req)
>  	return ret1 ? ret1 : ret2;
>  }
>  
> +static int ahash_noimport(struct ahash_request *req, const void *in)
> +{
> +	return -ENOSYS;
> +}
> +
> +static int ahash_noexport(struct ahash_request *req, void *out)
> +{
> +	return -ENOSYS;
> +}
> +
>  static int hmac_sha1_init(struct ahash_request *req)
>  {
>  	struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
> @@ -1507,6 +1517,8 @@ static struct hash_algo_template hash_algs[] = {
>  			.update = ahash_update,
>  			.final = ahash_final,
>  			.digest = ahash_sha1_digest,
> +			.export = ahash_noexport,
> +			.import = ahash_noimport,
>  			.halg.digestsize = SHA1_DIGEST_SIZE,
>  			.halg.statesize = sizeof(struct hash_ctx),
>  			.halg.base = {
> @@ -1529,6 +1541,8 @@ static struct hash_algo_template hash_algs[] = {
>  			.update	= ahash_update,
>  			.final = ahash_final,
>  			.digest = ahash_sha256_digest,
> +			.export = ahash_noexport,
> +			.import = ahash_noimport,
>  			.halg.digestsize = SHA256_DIGEST_SIZE,
>  			.halg.statesize = sizeof(struct hash_ctx),
>  			.halg.base = {
> @@ -1553,6 +1567,8 @@ static struct hash_algo_template hash_algs[] = {
>  			.final = ahash_final,
>  			.digest = hmac_sha1_digest,
>  			.setkey = hmac_sha1_setkey,
> +			.export = ahash_noexport,
> +			.import = ahash_noimport,
>  			.halg.digestsize = SHA1_DIGEST_SIZE,
>  			.halg.statesize = sizeof(struct hash_ctx),
>  			.halg.base = {
> @@ -1577,6 +1593,8 @@ static struct hash_algo_template hash_algs[] = {
>  			.final = ahash_final,
>  			.digest = hmac_sha256_digest,
>  			.setkey = hmac_sha256_setkey,
> +			.export = ahash_noexport,
> +			.import = ahash_noimport,
>  			.halg.digestsize = SHA256_DIGEST_SIZE,
>  			.halg.statesize = sizeof(struct hash_ctx),
>  			.halg.base = {
> 

-- 
Best regards,
Kamil Konieczny
Samsung R&D Institute Poland