From: <Tudor.Ambarus@microchip.com>
To: <p.yadav@ti.com>, <michael@walle.cc>, <miquel.raynal@bootlin.com>,
<richard@nod.at>, <vigneshr@ti.com>, <broonie@kernel.org>,
<linux-mtd@lists.infradead.org>, <linux-kernel@vger.kernel.org>,
<linux-spi@vger.kernel.org>
Subject: Re: [PATCH v2 4/6] spi: spi-mem: reject partial cycle transfers in 8D-8D-8D mode
Date: Thu, 23 Dec 2021 11:43:06 +0000 [thread overview]
Message-ID: <0e22270e-7c4a-9ba3-e468-963d21ab63a0@microchip.com> (raw)
In-Reply-To: <20210531181757.19458-5-p.yadav@ti.com>
On 5/31/21 9:17 PM, Pratyush Yadav wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> In 8D-8D-8D mode two bytes are transferred per cycle. So an odd number
> of bytes cannot be transferred because it would leave a residual half
> cycle at the end. Consider such a transfer invalid and reject it.
>
> Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
> Reviewed-by: Mark Brown <broonie@kernel.org>
>
> ---
>
> Changes in v2:
> - Add Mark's R-by (spell corrected).
>
> drivers/spi/spi-mem.c | 12 +++++++++++-
> 1 file changed, 11 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/spi/spi-mem.c b/drivers/spi/spi-mem.c
> index 1513553e4080..ab9eefbaa1d9 100644
> --- a/drivers/spi/spi-mem.c
> +++ b/drivers/spi/spi-mem.c
> @@ -162,7 +162,17 @@ static bool spi_mem_check_buswidth(struct spi_mem *mem,
> bool spi_mem_dtr_supports_op(struct spi_mem *mem,
> const struct spi_mem_op *op)
> {
> - if (op->cmd.nbytes != 2)
> + if (op->cmd.buswidth == 8 && op->cmd.nbytes % 2)
!IS_ALIGNED(op->cmd.nbytes, 2)?
> + return false;
> +
> + if (op->addr.nbytes && op->addr.buswidth == 8 && op->addr.nbytes % 2)
> + return false;
> +
> + if (op->dummy.nbytes && op->dummy.buswidth == 8 && op->dummy.nbytes % 2)
> + return false;
> +
> + if (op->data.dir != SPI_MEM_NO_DATA &&
> + op->dummy.buswidth == 8 && op->data.nbytes % 2)
dummy is sent on the same buswidth as data's indeed, but I would
s/op->dummy.buswidth/op->data.buswidth for code consistency reasons.
> return false;
>
> return spi_mem_check_buswidth(mem, op);
> --
> 2.30.0
>
next prev parent reply other threads:[~2021-12-23 11:43 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-31 18:17 [PATCH v2 0/6] Avoid odd length/address read/writes " Pratyush Yadav
2021-05-31 18:17 ` [PATCH v2 1/6] mtd: spi-nor: core: use 2 data bytes for template ops Pratyush Yadav
2021-06-01 12:36 ` Michael Walle
2021-05-31 18:17 ` [PATCH v2 2/6] mtd: spi-nor: spansion: write 2 bytes when disabling Octal DTR mode Pratyush Yadav
2021-06-01 12:47 ` Michael Walle
2021-06-02 7:42 ` Pratyush Yadav
2021-12-23 13:06 ` Tudor.Ambarus
2021-12-23 13:11 ` Tudor.Ambarus
2021-12-23 13:24 ` Tudor.Ambarus
2021-05-31 18:17 ` [PATCH v2 3/6] mtd: spi-nor: micron-st: " Pratyush Yadav
2021-05-31 18:17 ` [PATCH v2 4/6] spi: spi-mem: reject partial cycle transfers in 8D-8D-8D mode Pratyush Yadav
2021-12-23 11:43 ` Tudor.Ambarus [this message]
2021-12-23 11:47 ` Pratyush Yadav
2021-05-31 18:17 ` [PATCH v2 5/6] mtd: spi-nor: core: avoid odd length/address reads on " Pratyush Yadav
2021-12-23 12:42 ` Tudor.Ambarus
2021-05-31 18:17 ` [PATCH v2 6/6] mtd: spi-nor: core: avoid odd length/address writes in " Pratyush Yadav
2021-06-01 12:44 ` Michael Walle
2021-12-23 12:59 ` Tudor.Ambarus
2021-12-23 13:31 ` (subset) Re: [PATCH v2 0/6] Avoid odd length/address read/writes " Tudor Ambarus
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