From: <Tudor.Ambarus@microchip.com>
To: <p.yadav@ti.com>, <michael@walle.cc>, <miquel.raynal@bootlin.com>,
<richard@nod.at>, <vigneshr@ti.com>, <broonie@kernel.org>,
<linux-mtd@lists.infradead.org>, <linux-kernel@vger.kernel.org>,
<linux-spi@vger.kernel.org>
Subject: Re: [PATCH v2 6/6] mtd: spi-nor: core: avoid odd length/address writes in 8D-8D-8D mode
Date: Thu, 23 Dec 2021 12:59:29 +0000 [thread overview]
Message-ID: <91d954d5-f301-76ba-2da0-9e088b7ae291@microchip.com> (raw)
In-Reply-To: <20210531181757.19458-7-p.yadav@ti.com>
On 5/31/21 9:17 PM, Pratyush Yadav wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> On Octal DTR capable flashes like Micron Xcella the writes cannot start
> or end at an odd address in Octal DTR mode. Extra 0xff bytes need to be
> appended or prepended to make sure the start address and end address are
> even. 0xff is used because on NOR flashes a program operation can only
> flip bits from 1 to 0, not the other way round. 0 to 1 flip needs to
> happen via erases.
>
> Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
>
> ---
>
> Changes in v2:
> - Replace semicolon in subject with colon.
> - Add a comment that ret < 0 after adjusting for extra bytes is not
> possible, and add a WARN_ON() on the condition to make sure it gets
> spotted quickly when some change triggers this bug.
>
> drivers/mtd/spi-nor/core.c | 73 +++++++++++++++++++++++++++++++++++++-
> 1 file changed, 72 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
> index a696af6a1b71..d2a7e16e667d 100644
> --- a/drivers/mtd/spi-nor/core.c
> +++ b/drivers/mtd/spi-nor/core.c
> @@ -2023,6 +2023,72 @@ static int spi_nor_read(struct mtd_info *mtd, loff_t from, size_t len,
> return ret;
> }
>
> +/*
let's add kernel-doc comments for new methods.
> + * On Octal DTR capable flashes like Micron Xcella the writes cannot start or
strip "the" from "the writes". But I think I would get rid of the Micron Xcella example,
we're using these methods for all the 8D-8D-8D flashes. You can mention Micron in the
commit message if you want, but we shouldn't mention manufacturers in the core.
> + * end at an odd address in Octal DTR mode. Extra 0xff bytes need to be appended
> + * or prepended to make sure the start address and end address are even. 0xff is
> + * used because on NOR flashes a program operation can only flip bits from 1 to
> + * 0, not the other way round. 0 to 1 flip needs to happen via erases.
> + */
> +static int spi_nor_octal_dtr_write(struct spi_nor *nor, loff_t to, size_t len,
> + const u8 *buf)
> +{
> + u8 *tmp_buf;
> + size_t bytes_written;
> + loff_t start, end;
> + int ret;
> +
> + if (IS_ALIGNED(to, 2) && IS_ALIGNED(len, 2))
> + return spi_nor_write_data(nor, to, len, buf);
> +
> + tmp_buf = kmalloc(nor->page_size, GFP_KERNEL);> + if (!tmp_buf)
> + return -ENOMEM;
> +
> + memset(tmp_buf, 0xff, nor->page_size);
> +
> + start = round_down(to, 2);
> + end = round_up(to + len, 2);
> +
> + memcpy(tmp_buf + (to - start), buf, len);
> +
> + ret = spi_nor_write_data(nor, start, end - start, tmp_buf);
> + if (ret == 0) {
> + ret = -EIO;
> + goto out;
> + }
> + if (ret < 0)
> + goto out;
> +
> + /*
> + * More bytes are written than actually requested, but that number can't
> + * be reported to the calling function or it will confuse its
> + * calculations. Calculate how many of the _requested_ bytes were
> + * written.
> + */
> + bytes_written = ret;
> +
> + if (to != start)
> + ret -= to - start;
> +
> + /*
> + * Only account for extra bytes at the end if they were actually
> + * written. For example, if for some reason the controller could only
> + * complete a partial write then the adjustment for the extra bytes at
> + * the end is not needed.
> + */
> + if (start + bytes_written == end)
> + ret -= end - (to + len);
> +
> + /* Should not be possible. */
> + if (WARN_ON(ret < 0))
> + ret = -EIO;
Is this really needed? Also, I think I would squash patch 5 and 6,
it's the same idea, and reads and writes are tied together.
Looks good!
> +
> +out:
> + kfree(tmp_buf);
> + return ret;
> +}
> +
> /*
> * Write an address range to the nor chip. Data must be written in
> * FLASH_PAGESIZE chunks. The address range may be any size provided
> @@ -2067,7 +2133,12 @@ static int spi_nor_write(struct mtd_info *mtd, loff_t to, size_t len,
> if (ret)
> goto write_err;
>
> - ret = spi_nor_write_data(nor, addr, page_remain, buf + i);
> + if (nor->write_proto == SNOR_PROTO_8_8_8_DTR)
> + ret = spi_nor_octal_dtr_write(nor, addr, page_remain,
> + buf + i);
> + else
> + ret = spi_nor_write_data(nor, addr, page_remain,
> + buf + i);
> if (ret < 0)
> goto write_err;
> written = ret;
> --
> 2.30.0
>
next prev parent reply other threads:[~2021-12-23 12:59 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-31 18:17 [PATCH v2 0/6] Avoid odd length/address read/writes " Pratyush Yadav
2021-05-31 18:17 ` [PATCH v2 1/6] mtd: spi-nor: core: use 2 data bytes for template ops Pratyush Yadav
2021-06-01 12:36 ` Michael Walle
2021-05-31 18:17 ` [PATCH v2 2/6] mtd: spi-nor: spansion: write 2 bytes when disabling Octal DTR mode Pratyush Yadav
2021-06-01 12:47 ` Michael Walle
2021-06-02 7:42 ` Pratyush Yadav
2021-12-23 13:06 ` Tudor.Ambarus
2021-12-23 13:11 ` Tudor.Ambarus
2021-12-23 13:24 ` Tudor.Ambarus
2021-05-31 18:17 ` [PATCH v2 3/6] mtd: spi-nor: micron-st: " Pratyush Yadav
2021-05-31 18:17 ` [PATCH v2 4/6] spi: spi-mem: reject partial cycle transfers in 8D-8D-8D mode Pratyush Yadav
2021-12-23 11:43 ` Tudor.Ambarus
2021-12-23 11:47 ` Pratyush Yadav
2021-05-31 18:17 ` [PATCH v2 5/6] mtd: spi-nor: core: avoid odd length/address reads on " Pratyush Yadav
2021-12-23 12:42 ` Tudor.Ambarus
2021-05-31 18:17 ` [PATCH v2 6/6] mtd: spi-nor: core: avoid odd length/address writes in " Pratyush Yadav
2021-06-01 12:44 ` Michael Walle
2021-12-23 12:59 ` Tudor.Ambarus [this message]
2021-12-23 13:31 ` (subset) Re: [PATCH v2 0/6] Avoid odd length/address read/writes " Tudor Ambarus
[not found] <DU2PR04MB85678048FE8B475B1E323E0AED802@DU2PR04MB8567.eurprd04.prod.outlook.com>
2025-04-29 9:22 ` [PATCH v2 6/6] mtd: spi-nor: core: avoid odd length/address writes " Tudor Ambarus
2025-05-07 9:43 ` Pratyush Yadav
2025-05-12 7:57 ` Miquel Raynal
2025-05-12 8:33 ` Bough Chen
2025-05-12 9:34 ` Pratyush Yadav
2025-05-12 11:09 ` Bough Chen
2025-07-01 7:47 ` Luke Wang
2025-07-24 14:14 ` Pratyush Yadav
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