From: "Arnd Bergmann" <arnd@arndb.de>
To: aspeedyh <yh_chung@aspeedtech.com>,
"Andrew Jeffery" <andrew@codeconstruct.com.au>,
"Conor Dooley" <conor@kernel.org>
Cc: "Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Joel Stanley" <joel@jms.id.au>,
"Ryan Chen" <ryan_chen@aspeedtech.com>,
"Philipp Zabel" <p.zabel@pengutronix.de>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"linux-aspeed@lists.ozlabs.org" <linux-aspeed@lists.ozlabs.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"openbmc@lists.ozlabs.org" <openbmc@lists.ozlabs.org>,
"maciej.lawniczak@intel.com" <maciej.lawniczak@intel.com>,
"Mark Brown" <broonie@kernel.org>
Subject: Re: [PATCH 0/7] soc: aspeed: Add AST2600 eSPI controller support
Date: Tue, 17 Mar 2026 10:50:10 +0100 [thread overview]
Message-ID: <0f7f0f96-a918-47d5-a0bd-bbde494c8fed@app.fastmail.com> (raw)
In-Reply-To: <KL1PR0601MB4276ED93723F0B1F42349AD89041A@KL1PR0601MB4276.apcprd06.prod.outlook.com>
On Tue, Mar 17, 2026, at 09:14, YH Chung wrote:
>
> In the meantime, my understanding is that this driver is for the Intel
> eSPI interface used by the AST2600 BMC,
> rather than fitting a conventional SPI controller/device model. That
> was the reason for initially placing it under
> drivers/soc/aspeed/, since there does not appear to be an in-tree eSPI
> subsystem at present.
> However, if that is not the preferred upstream direction, we are happy
> to restructure the series accordingly.
> It would be very helpful if you could advise on the preferred placement.
I think we need to make sure everyone understands what the options are
here based on what the hardware can do, and what your use cases require.
From reading the old comments that Andrew linked to at
https://lore.kernel.org/linux-aspeed/HK0PR06MB377924CFCBFE9BD40E1C4A5D91D49@HK0PR06MB3779.apcprd06.prod.outlook.com/
I understand that the SoC has a "hardware mode" in which eSPI is
directly implemented by redirecting upper-level eSPI transactions into
functional blocks of the chip, while the software mode behaves like
a regular SPI endpoint controller and your driver implements the
same interfaces in a mix of kernel and userspace components. Can you
confirm that this is a correct understanding of what the hardware
does, or where I misunderstand parts?
If I understood this correctly, I think there is a general agreement
upstream that the low-level device access should indeed be in a
drivers/spi driver, with no ports of it in drivers/soc/aspeed. Using
a portable driver subsystem is always better than a custom solution
if it works at all.
For the higher-level interfaces (flash, gpio, ...), I don't think
there is any consensus yet about how this should be done, but again
I think this won't be drivers/soc but instead something more
generic.
One option here would be to sidestep this problem entirely by
moving all of the eSPI implementation out of the kernel but instead
have a hardware-independent userspace implementation that uses
the spidev ioctl interface. This is always going to be slower than
an in-kernel implementation, but also much easier to implement
and debug.
An in-kernel implementation of the eSPI backend (on top of
the SPI layer) is certainly a realistic option for the higher
layers, but requires finding consensus both on the the logistics
(subsystem, code ownership, interfaces to other subsystems)
and more importantly the user space interfaces that look like
they will require several revisions on top of what you have
today.
Arnd
next prev parent reply other threads:[~2026-03-17 9:50 UTC|newest]
Thread overview: 45+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-13 10:07 aspeedyh
2026-03-13 10:07 ` [PATCH 1/7] dt-bindings: soc: aspeed: Add AST2600 eSPI controller aspeedyh
2026-03-16 7:07 ` Krzysztof Kozlowski
2026-03-16 8:17 ` YH Chung
2026-03-16 11:04 ` Conor Dooley
2026-03-17 8:43 ` YH Chung
2026-03-13 10:07 ` [PATCH 2/7] soc: aspeed: Introduce core eSPI controller support aspeedyh
2026-03-16 9:57 ` Philipp Zabel
2026-03-17 8:40 ` YH Chung
2026-03-13 10:07 ` [PATCH 3/7] soc: aspeed: Add AST2600 peripheral channel port I/O support aspeedyh
2026-05-07 14:03 ` Shulzhenko, Oleksandr
2026-03-13 10:07 ` [PATCH 4/7] soc: aspeed: Add eSPI TAFS backend support aspeedyh
2026-03-13 10:07 ` [PATCH 5/7] soc: aspeed: Add eSPI flash channel support aspeedyh
2026-03-19 23:53 ` kernel test robot
2026-03-20 1:17 ` kernel test robot
2026-03-20 4:19 ` kernel test robot
2026-06-24 12:02 ` Markus Elfring
2026-06-29 8:10 ` YH Chung
2026-06-24 12:14 ` Markus Elfring
2026-06-29 8:15 ` YH Chung
2026-06-29 8:50 ` [5/7] " Markus Elfring
2026-06-30 5:02 ` YH Chung
2026-03-13 10:07 ` [PATCH 6/7] soc: aspeed: Add sysfs controls for flash backend selection aspeedyh
2026-03-13 10:07 ` [PATCH 7/7] arm: dts: aspeed: Add eSPI node for AST2600 aspeedyh
2026-03-13 16:24 ` [PATCH 0/7] soc: aspeed: Add AST2600 eSPI controller support Conor Dooley
2026-03-13 16:32 ` Mark Brown
2026-03-13 16:48 ` Mark Brown
2026-03-16 3:07 ` YH Chung
2026-03-13 21:36 ` Arnd Bergmann
2026-03-14 1:02 ` Mark Brown
2026-03-16 6:06 ` Ivan Mikhaylov
2026-03-16 6:34 ` Andrew Jeffery
2026-03-17 8:14 ` YH Chung
2026-03-17 9:50 ` Arnd Bergmann [this message]
2026-03-25 8:41 ` YH Chung
2026-03-25 10:30 ` Arnd Bergmann
2026-03-27 4:14 ` YH Chung
2026-04-07 9:36 ` YH Chung
2026-05-07 16:00 ` Shulzhenko, Oleksandr
2026-05-12 7:08 ` YH Chung
2026-05-12 8:45 ` Shulzhenko, Oleksandr
2026-05-19 10:40 ` YH Chung
2026-06-03 5:25 ` YH Chung
2026-06-22 7:31 ` YH Chung
2026-06-24 3:59 ` YH Chung
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=0f7f0f96-a918-47d5-a0bd-bbde494c8fed@app.fastmail.com \
--to=arnd@arndb.de \
--cc=andrew@codeconstruct.com.au \
--cc=broonie@kernel.org \
--cc=conor+dt@kernel.org \
--cc=conor@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=joel@jms.id.au \
--cc=krzk+dt@kernel.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-aspeed@lists.ozlabs.org \
--cc=linux-kernel@vger.kernel.org \
--cc=maciej.lawniczak@intel.com \
--cc=openbmc@lists.ozlabs.org \
--cc=p.zabel@pengutronix.de \
--cc=robh@kernel.org \
--cc=ryan_chen@aspeedtech.com \
--cc=yh_chung@aspeedtech.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®