From: Mark Brown <broonie@kernel.org>
To: Arnd Bergmann <arnd@arndb.de>
Cc: Conor Dooley <conor@kernel.org>,
aspeedyh <yh_chung@aspeedtech.com>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>, Joel Stanley <joel@jms.id.au>,
Andrew Jeffery <andrew@codeconstruct.com.au>,
Ryan Chen <ryan_chen@aspeedtech.com>,
Philipp Zabel <p.zabel@pengutronix.de>,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org,
openbmc@lists.ozlabs.org, maciej.lawniczak@intel.com
Subject: Re: [PATCH 0/7] soc: aspeed: Add AST2600 eSPI controller support
Date: Sat, 14 Mar 2026 01:02:39 +0000 [thread overview]
Message-ID: <abSzrxJVcWi6VNTJ@sirena.co.uk> (raw)
In-Reply-To: <23909400-4e7f-49c9-a982-14036372af98@app.fastmail.com>
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On Fri, Mar 13, 2026 at 10:36:02PM +0100, Arnd Bergmann wrote:
> On Fri, Mar 13, 2026, at 17:24, Conor Dooley wrote:
> > FSL's appears to be there.
> I think this is just a similarly named device: Freescale/NXP's eSPI
> device driver is unrelated to the Intel eSPI spec but rather implements
> a normal SPI driver the same way that eDMA and eSDHC are Freescale's
> implementation of dmaengine and SDHCI drivers.
Yeah, SPI with a random letter or string in front of it is usually just
someone made a new controller for some reason (often a new feature, like
all the QuadSPI devices) and wants to differentiate it from their old
ones or connect it to other branding.
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next prev parent reply other threads:[~2026-03-14 1:02 UTC|newest]
Thread overview: 45+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-13 10:07 aspeedyh
2026-03-13 10:07 ` [PATCH 1/7] dt-bindings: soc: aspeed: Add AST2600 eSPI controller aspeedyh
2026-03-16 7:07 ` Krzysztof Kozlowski
2026-03-16 8:17 ` YH Chung
2026-03-16 11:04 ` Conor Dooley
2026-03-17 8:43 ` YH Chung
2026-03-13 10:07 ` [PATCH 2/7] soc: aspeed: Introduce core eSPI controller support aspeedyh
2026-03-16 9:57 ` Philipp Zabel
2026-03-17 8:40 ` YH Chung
2026-03-13 10:07 ` [PATCH 3/7] soc: aspeed: Add AST2600 peripheral channel port I/O support aspeedyh
2026-05-07 14:03 ` Shulzhenko, Oleksandr
2026-03-13 10:07 ` [PATCH 4/7] soc: aspeed: Add eSPI TAFS backend support aspeedyh
2026-03-13 10:07 ` [PATCH 5/7] soc: aspeed: Add eSPI flash channel support aspeedyh
2026-03-19 23:53 ` kernel test robot
2026-03-20 1:17 ` kernel test robot
2026-03-20 4:19 ` kernel test robot
2026-06-24 12:02 ` Markus Elfring
2026-06-29 8:10 ` YH Chung
2026-06-24 12:14 ` Markus Elfring
2026-06-29 8:15 ` YH Chung
2026-06-29 8:50 ` [5/7] " Markus Elfring
2026-06-30 5:02 ` YH Chung
2026-03-13 10:07 ` [PATCH 6/7] soc: aspeed: Add sysfs controls for flash backend selection aspeedyh
2026-03-13 10:07 ` [PATCH 7/7] arm: dts: aspeed: Add eSPI node for AST2600 aspeedyh
2026-03-13 16:24 ` [PATCH 0/7] soc: aspeed: Add AST2600 eSPI controller support Conor Dooley
2026-03-13 16:32 ` Mark Brown
2026-03-13 16:48 ` Mark Brown
2026-03-16 3:07 ` YH Chung
2026-03-13 21:36 ` Arnd Bergmann
2026-03-14 1:02 ` Mark Brown [this message]
2026-03-16 6:06 ` Ivan Mikhaylov
2026-03-16 6:34 ` Andrew Jeffery
2026-03-17 8:14 ` YH Chung
2026-03-17 9:50 ` Arnd Bergmann
2026-03-25 8:41 ` YH Chung
2026-03-25 10:30 ` Arnd Bergmann
2026-03-27 4:14 ` YH Chung
2026-04-07 9:36 ` YH Chung
2026-05-07 16:00 ` Shulzhenko, Oleksandr
2026-05-12 7:08 ` YH Chung
2026-05-12 8:45 ` Shulzhenko, Oleksandr
2026-05-19 10:40 ` YH Chung
2026-06-03 5:25 ` YH Chung
2026-06-22 7:31 ` YH Chung
2026-06-24 3:59 ` YH Chung
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