From: "Chang S. Bae" <chang.seok.bae@intel.com>
To: Sohil Mehta <sohil.mehta@intel.com>,
Dave Hansen <dave.hansen@intel.com>,
"Maciej W. Rozycki" <macro@orcam.me.uk>
Cc: <linux-kernel@vger.kernel.org>, <x86@kernel.org>,
<tglx@kernel.org>, "Ingo Molnar" <mingo@redhat.com>,
<bp@alien8.de>, <dave.hansen@linux.intel.com>, <hpa@zytor.com>
Subject: Re: [PATCH] x86/microcode/intel: Panic on partial microcode update
Date: Mon, 27 Jul 2026 19:58:39 -0700 [thread overview]
Message-ID: <12374cc0-aa93-409f-8108-7e9f5d7160e1@intel.com> (raw)
In-Reply-To: <e97add0e-33f1-4837-9642-91e1d9773288@intel.com>
On 7/27/2026 2:59 PM, Sohil Mehta wrote:
>
> What does an authentication failure mean in this context?
The spec has this:
When set to 1, it indicates that an authentication failure occurred on
some portion of the MCU after another portion had already been
committed and the Revision ID had already been updated on the most
recent write to IA32_BIOS_UPDT_TRIG.
It would be helpful if including some examples, but those appear to fall
under microcode implementation details as I heard.
> Does that mean unauthenticated microcode components somehow got loaded?
>
> or that
>
> Someone attempted to load bogus microcode which was rejected by the
> processor?
First, the SDM describes the legacy behavior in Vol.3A 12.11.7 "Update
Signature and Verification". In the legacy flow, an invalid or
unauthenticated patch is rejected _before_ the revision ID is updated.
So the outcome is effectively binary: either the update succeeds, or it
is rejected.
The partial-update status introduce a third outcome. Some portion of the
update has already been committed and (maybe, therefore) the revision ID
has been updated, but another portion failed. The result is not the
simple "accepted" or "rejected" state. This thus could be seen as a
bogus state from this perspective, TBH.
> If it was rejected, then there is no need to panic, right? Just warning
> about the attempt should be enough.
In this new state, the processor may either continue operating or end up
running with a combination of sub-components that has never been tested.
Given that, I think one question to ask in the end is whether we trust
the microcode's own error handling (completely), or not.
Thanks,
Chang
next prev parent reply other threads:[~2026-07-28 2:58 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-30 19:13 Chang S. Bae
2026-06-30 21:38 ` Dave Hansen
2026-06-30 21:47 ` Dave Hansen
2026-06-30 23:21 ` Borislav Petkov
2026-07-01 19:02 ` Chang S. Bae
2026-07-18 22:54 ` Maciej W. Rozycki
2026-07-19 15:52 ` Dave Hansen
2026-07-23 22:42 ` Maciej W. Rozycki
2026-07-27 12:35 ` Nikolay Borisov
2026-07-28 21:53 ` Maciej W. Rozycki
2026-07-27 20:36 ` Chang S. Bae
2026-07-27 21:59 ` Sohil Mehta
2026-07-28 2:58 ` Chang S. Bae [this message]
2026-07-28 14:12 ` Dave Hansen
2026-07-28 18:56 ` David Laight
2026-07-28 20:48 ` Dave Hansen
2026-07-28 21:47 ` Maciej W. Rozycki
2026-07-28 21:53 ` Dave Hansen
2026-07-28 22:09 ` David Laight
2026-07-08 21:18 ` [PATCH v2] x86/microcode/intel: Taint kernel on partial update Chang S. Bae
2026-07-27 11:27 ` Nikolay Borisov
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