From: David Daney <ddaney.cavm@gmail.com>
To: linux-mips@linux-mips.org, ralf@linux-mips.org,
kvm@vger.kernel.org, Sanjay Lal <sanjayl@kymasys.com>
Cc: linux-kernel@vger.kernel.org, David Daney <david.daney@cavium.com>
Subject: [PATCH 11/31] MIPS: Rearrange branch.c so it can be used by kvm code.
Date: Fri, 7 Jun 2013 16:03:15 -0700 [thread overview]
Message-ID: <1370646215-6543-12-git-send-email-ddaney.cavm@gmail.com> (raw)
In-Reply-To: <1370646215-6543-1-git-send-email-ddaney.cavm@gmail.com>
From: David Daney <david.daney@cavium.com>
Introduce __compute_return_epc_for_insn0() entry point.
Signed-off-by: David Daney <david.daney@cavium.com>
---
arch/mips/include/asm/branch.h | 7 +++++
arch/mips/kernel/branch.c | 63 +++++++++++++++++++++++++++++++-----------
2 files changed, 54 insertions(+), 16 deletions(-)
diff --git a/arch/mips/include/asm/branch.h b/arch/mips/include/asm/branch.h
index e28a3e0..b3de685 100644
--- a/arch/mips/include/asm/branch.h
+++ b/arch/mips/include/asm/branch.h
@@ -37,6 +37,13 @@ static inline unsigned long exception_epc(struct pt_regs *regs)
#define BRANCH_LIKELY_TAKEN 0x0001
+extern int __compute_return_epc(struct pt_regs *regs);
+extern int __compute_return_epc_for_insn(struct pt_regs *regs,
+ union mips_instruction insn);
+extern int __compute_return_epc_for_insn0(struct pt_regs *regs,
+ union mips_instruction insn,
+ unsigned int (*get_fcr31)(void));
+
static inline int compute_return_epc(struct pt_regs *regs)
{
if (get_isa16_mode(regs->cp0_epc)) {
diff --git a/arch/mips/kernel/branch.c b/arch/mips/kernel/branch.c
index 46c2ad0..e47145b 100644
--- a/arch/mips/kernel/branch.c
+++ b/arch/mips/kernel/branch.c
@@ -195,17 +195,18 @@ int __MIPS16e_compute_return_epc(struct pt_regs *regs)
}
/**
- * __compute_return_epc_for_insn - Computes the return address and do emulate
+ * __compute_return_epc_for_insn0 - Computes the return address and do emulate
* branch simulation, if required.
*
* @regs: Pointer to pt_regs
* @insn: branch instruction to decode
- * @returns: -EFAULT on error and forces SIGBUS, and on success
+ * @returns: -EFAULT on error, and on success
* returns 0 or BRANCH_LIKELY_TAKEN as appropriate after
* evaluating the branch.
*/
-int __compute_return_epc_for_insn(struct pt_regs *regs,
- union mips_instruction insn)
+int __compute_return_epc_for_insn0(struct pt_regs *regs,
+ union mips_instruction insn,
+ unsigned int (*get_fcr31)(void))
{
unsigned int bit, fcr31, dspcontrol;
long epc = regs->cp0_epc;
@@ -281,7 +282,7 @@ int __compute_return_epc_for_insn(struct pt_regs *regs,
case bposge32_op:
if (!cpu_has_dsp)
- goto sigill;
+ return -EFAULT;
dspcontrol = rddsp(0x01);
@@ -364,13 +365,7 @@ int __compute_return_epc_for_insn(struct pt_regs *regs,
* And now the FPA/cp1 branch instructions.
*/
case cop1_op:
- preempt_disable();
- if (is_fpu_owner())
- asm volatile("cfc1\t%0,$31" : "=r" (fcr31));
- else
- fcr31 = current->thread.fpu.fcr31;
- preempt_enable();
-
+ fcr31 = get_fcr31();
bit = (insn.i_format.rt >> 2);
bit += (bit != 0);
bit += 23;
@@ -434,11 +429,47 @@ int __compute_return_epc_for_insn(struct pt_regs *regs,
}
return ret;
+}
+EXPORT_SYMBOL_GPL(__compute_return_epc_for_insn0);
-sigill:
- printk("%s: DSP branch but not DSP ASE - sending SIGBUS.\n", current->comm);
- force_sig(SIGBUS, current);
- return -EFAULT;
+static unsigned int __get_fcr31(void)
+{
+ unsigned int fcr31;
+
+ preempt_disable();
+ if (is_fpu_owner())
+ asm volatile(
+ ".set push\n"
+ "\t.set mips1\n"
+ "\tcfc1\t%0,$31\n"
+ "\t.set pop" : "=r" (fcr31));
+ else
+ fcr31 = current->thread.fpu.fcr31;
+ preempt_enable();
+ return fcr31;
+}
+
+/**
+ * __compute_return_epc_for_insn - Computes the return address and do emulate
+ * branch simulation, if required.
+ *
+ * @regs: Pointer to pt_regs
+ * @insn: branch instruction to decode
+ * @returns: -EFAULT on error and forces SIGBUS, and on success
+ * returns 0 or BRANCH_LIKELY_TAKEN as appropriate after
+ * evaluating the branch.
+ */
+int __compute_return_epc_for_insn(struct pt_regs *regs,
+ union mips_instruction insn)
+{
+ int r = __compute_return_epc_for_insn0(regs, insn, __get_fcr31);
+
+ if (r < 0) {
+ printk("%s: DSP branch but not DSP ASE - sending SIGBUS.\n", current->comm);
+ force_sig(SIGBUS, current);
+ }
+
+ return r;
}
EXPORT_SYMBOL_GPL(__compute_return_epc_for_insn);
--
1.7.11.7
next prev parent reply other threads:[~2013-06-07 23:04 UTC|newest]
Thread overview: 81+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-06-07 23:03 [PATCH 00/31] KVM/MIPS: Implement hardware virtualization via the MIPS-VZ extensions David Daney
2013-06-07 23:03 ` [PATCH 01/31] MIPS: Move allocate_kscratch to cpu-probe.c and make it public David Daney
2013-06-14 11:41 ` Ralf Baechle
2013-06-14 13:11 ` Ralf Baechle
2013-06-07 23:03 ` [PATCH 02/31] MIPS: Save and restore K0/K1 when CONFIG_KVM_MIPSVZ David Daney
2013-06-07 23:03 ` [PATCH 03/31] mips/kvm: Fix 32-bitisms in kvm_locore.S David Daney
2013-06-14 13:09 ` Ralf Baechle
2013-06-14 13:21 ` Sergei Shtylyov
2013-06-07 23:03 ` [PATCH 04/31] mips/kvm: Add casts to avoid pointer width mismatch build failures David Daney
2013-06-14 13:14 ` Ralf Baechle
2013-06-07 23:03 ` [PATCH 05/31] mips/kvm: Use generic cache flushing functions David Daney
2013-06-14 13:17 ` Ralf Baechle
2013-06-07 23:03 ` [PATCH 06/31] mips/kvm: Rename kvm_vcpu_arch.pc to kvm_vcpu_arch.epc David Daney
2013-06-14 13:18 ` Ralf Baechle
2013-06-07 23:03 ` [PATCH 07/31] mips/kvm: Rename VCPU_registername to KVM_VCPU_ARCH_registername David Daney
2013-06-14 13:18 ` Ralf Baechle
2013-06-07 23:03 ` [PATCH 08/31] mips/kvm: Fix code formatting in arch/mips/kvm/kvm_locore.S David Daney
2013-06-14 13:21 ` Ralf Baechle
2013-06-07 23:03 ` [PATCH 09/31] mips/kvm: Factor trap-and-emulate support into a pluggable implementation David Daney
2013-06-14 13:22 ` Ralf Baechle
2013-06-07 23:03 ` [PATCH 10/31] mips/kvm: Implement ioctls to get and set FPU registers David Daney
2013-06-14 16:11 ` Ralf Baechle
2013-06-07 23:03 ` David Daney [this message]
2013-06-14 22:03 ` [PATCH 11/31] MIPS: Rearrange branch.c so it can be used by kvm code Ralf Baechle
2013-06-07 23:03 ` [PATCH 12/31] MIPS: Add instruction format information for WAIT, MTC0, MFC0, et al David Daney
2013-06-14 22:07 ` Ralf Baechle
2013-06-07 23:03 ` [PATCH 13/31] mips/kvm: Add accessors for MIPS VZ registers David Daney
2013-06-14 22:10 ` Ralf Baechle
2013-06-07 23:03 ` [PATCH 14/31] mips/kvm: Add thread_info flag to indicate operation in MIPS VZ Guest Mode David Daney
2013-06-14 22:10 ` Ralf Baechle
2013-06-07 23:03 ` [PATCH 15/31] mips/kvm: Exception handling to leave and reenter guest mode David Daney
2013-06-15 10:00 ` Ralf Baechle
2013-10-11 12:51 ` James Hogan
2013-06-07 23:03 ` [PATCH 16/31] mips/kvm: Add exception handler for MIPSVZ Guest exceptions David Daney
2013-06-15 10:23 ` Ralf Baechle
2013-06-07 23:03 ` [PATCH 17/31] MIPS: Quit exposing Kconfig symbols in uapi headers David Daney
2013-06-14 11:12 ` Ralf Baechle
2013-06-15 17:13 ` Paolo Bonzini
2013-06-07 23:03 ` [PATCH 18/31] mips/kvm: Add pt_regs slots for BadInstr and BadInstrP David Daney
2013-06-15 10:25 ` Ralf Baechle
2013-06-07 23:03 ` [PATCH 19/31] mips/kvm: Add host definitions for MIPS VZ based host David Daney
2013-06-16 8:49 ` Ralf Baechle
2013-06-07 23:03 ` [PATCH 20/31] mips/kvm: Hook into TLB fault handlers David Daney
2013-06-07 23:34 ` Sergei Shtylyov
2013-06-08 0:15 ` David Daney
2013-06-16 8:51 ` Ralf Baechle
2013-06-07 23:03 ` [PATCH 21/31] mips/kvm: Allow set_except_vector() to be used from MIPSVZ code David Daney
2013-06-16 11:22 ` Ralf Baechle
2013-06-07 23:03 ` [PATCH 22/31] mips/kvm: Split get_new_mmu_context into two parts David Daney
2013-06-16 11:26 ` Ralf Baechle
2013-06-07 23:03 ` [PATCH 23/31] mips/kvm: Hook into CP unusable exception handler David Daney
2013-06-16 11:28 ` Ralf Baechle
2013-06-07 23:03 ` [PATCH 24/31] mips/kvm: Add thread_struct fields used by MIPSVZ hosts David Daney
2013-06-16 11:29 ` Ralf Baechle
2013-06-07 23:03 ` [PATCH 25/31] mips/kvm: Add some asm-offsets constants used by MIPSVZ David Daney
2013-06-16 11:31 ` Ralf Baechle
2013-08-06 17:23 ` David Daney
2013-06-07 23:03 ` [PATCH 26/31] mips/kvm: Split up Kconfig and Makefile definitions in preperation for MIPSVZ David Daney
2013-06-16 11:33 ` Ralf Baechle
2013-06-07 23:03 ` [PATCH 27/31] mips/kvm: Gate the use of kvm_local_flush_tlb_all() by KVM_MIPSTE David Daney
2013-06-16 11:42 ` Ralf Baechle
2013-06-07 23:03 ` [PATCH 28/31] mips/kvm: Only use KVM_COALESCED_MMIO_PAGE_OFFSET with KVM_MIPSTE David Daney
2013-06-16 12:03 ` Ralf Baechle
2013-06-07 23:03 ` [PATCH 29/31] mips/kvm: Add MIPSVZ support David Daney
2013-06-16 11:47 ` Ralf Baechle
2013-06-07 23:03 ` [PATCH 30/31] mips/kvm: Enable MIPSVZ in Kconfig/Makefile David Daney
2013-06-16 11:44 ` Ralf Baechle
2013-06-07 23:03 ` [PATCH 31/31] mips/kvm: Allow for upto 8 KVM vcpus per vm David Daney
2013-06-16 11:37 ` Ralf Baechle
2013-06-07 23:15 ` [PATCH 00/31] KVM/MIPS: Implement hardware virtualization via the MIPS-VZ extensions David Daney
2013-06-09 7:31 ` Gleb Natapov
2013-06-09 23:23 ` David Daney
2013-06-09 23:40 ` Maciej W. Rozycki
2013-06-10 11:16 ` Ralf Baechle
2013-06-10 6:18 ` Gleb Natapov
2013-06-10 16:37 ` Sanjay Lal
2013-06-16 11:59 ` Ralf Baechle
2013-06-10 16:43 ` Sanjay Lal
2013-06-10 17:14 ` David Daney
2013-06-14 11:12 ` Ralf Baechle
2013-06-19 9:06 ` Ralf Baechle
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