From: David Daney <ddaney.cavm@gmail.com>
To: linux-mips@linux-mips.org, ralf@linux-mips.org,
kvm@vger.kernel.org, Sanjay Lal <sanjayl@kymasys.com>
Cc: linux-kernel@vger.kernel.org, David Daney <david.daney@cavium.com>
Subject: [PATCH 02/31] MIPS: Save and restore K0/K1 when CONFIG_KVM_MIPSVZ
Date: Fri, 7 Jun 2013 16:03:06 -0700 [thread overview]
Message-ID: <1370646215-6543-3-git-send-email-ddaney.cavm@gmail.com> (raw)
In-Reply-To: <1370646215-6543-1-git-send-email-ddaney.cavm@gmail.com>
From: David Daney <david.daney@cavium.com>
We cannot clobber any registers on exceptions as any guest will need
them all.
Signed-off-by: David Daney <david.daney@cavium.com>
---
arch/mips/include/asm/mipsregs.h | 2 ++
arch/mips/include/asm/stackframe.h | 15 +++++++++++++++
arch/mips/kernel/cpu-probe.c | 7 ++++++-
arch/mips/kernel/genex.S | 5 +++++
arch/mips/kernel/scall64-64.S | 12 ++++++++++++
arch/mips/kernel/scall64-n32.S | 12 ++++++++++++
arch/mips/kernel/traps.c | 5 +++++
arch/mips/mm/tlbex.c | 25 +++++++++++++++++++++++++
8 files changed, 82 insertions(+), 1 deletion(-)
diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h
index 6e0da5aa..6f03c72 100644
--- a/arch/mips/include/asm/mipsregs.h
+++ b/arch/mips/include/asm/mipsregs.h
@@ -73,6 +73,8 @@
#define CP0_TAGHI $29
#define CP0_ERROREPC $30
#define CP0_DESAVE $31
+#define CP0_KSCRATCH1 $31, 2
+#define CP0_KSCRATCH2 $31, 3
/*
* R4640/R4650 cp0 register names. These registers are listed
diff --git a/arch/mips/include/asm/stackframe.h b/arch/mips/include/asm/stackframe.h
index a89d1b1..20627b2 100644
--- a/arch/mips/include/asm/stackframe.h
+++ b/arch/mips/include/asm/stackframe.h
@@ -181,6 +181,16 @@
#endif
LONG_S k0, PT_R29(sp)
LONG_S $3, PT_R3(sp)
+#ifdef CONFIG_KVM_MIPSVZ
+ /*
+ * With KVM_MIPSVZ, we must not clobber k0/k1
+ * they were saved before they were used
+ */
+ MFC0 k0, CP0_KSCRATCH1
+ MFC0 $3, CP0_KSCRATCH2
+ LONG_S k0, PT_R26(sp)
+ LONG_S $3, PT_R27(sp)
+#endif
/*
* You might think that you don't need to save $0,
* but the FPU emulator and gdb remote debug stub
@@ -447,6 +457,11 @@
.endm
.macro RESTORE_SP_AND_RET
+
+#ifdef CONFIG_KVM_MIPSVZ
+ LONG_L k0, PT_R26(sp)
+ LONG_L k1, PT_R27(sp)
+#endif
LONG_L sp, PT_R29(sp)
.set mips3
eret
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index ee1014e..7a07edb 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -1067,7 +1067,12 @@ __cpuinit void cpu_report(void)
static DEFINE_SPINLOCK(kscratch_used_lock);
-static unsigned int kscratch_used_mask;
+static unsigned int kscratch_used_mask
+#ifdef CONFIG_KVM_MIPSVZ
+/* KVM_MIPSVZ implemtation uses these two statically. */
+= 0xc
+#endif
+;
int allocate_kscratch(void)
{
diff --git a/arch/mips/kernel/genex.S b/arch/mips/kernel/genex.S
index 31fa856..163e299 100644
--- a/arch/mips/kernel/genex.S
+++ b/arch/mips/kernel/genex.S
@@ -46,6 +46,11 @@
NESTED(except_vec3_generic, 0, sp)
.set push
.set noat
+#ifdef CONFIG_KVM_MIPSVZ
+ /* With KVM_MIPSVZ, we must not clobber k0/k1 */
+ MTC0 k0, CP0_KSCRATCH1
+ MTC0 k1, CP0_KSCRATCH2
+#endif
#if R5432_CP0_INTERRUPT_WAR
mfc0 k0, CP0_INDEX
#endif
diff --git a/arch/mips/kernel/scall64-64.S b/arch/mips/kernel/scall64-64.S
index 97a5909..5ff4882 100644
--- a/arch/mips/kernel/scall64-64.S
+++ b/arch/mips/kernel/scall64-64.S
@@ -62,6 +62,9 @@ NESTED(handle_sys64, PT_SIZE, sp)
jalr t2 # Do The Real Thing (TM)
li t0, -EMAXERRNO - 1 # error?
+#if defined(CONFIG_KVM_MIPSVZ) && defined(CONFIG_FAST_ACCESS_TO_THREAD_POINTER)
+ ld t2, TI_TP_VALUE($28)
+#endif
sltu t0, t0, v0
sd t0, PT_R7(sp) # set error flag
beqz t0, 1f
@@ -70,6 +73,9 @@ NESTED(handle_sys64, PT_SIZE, sp)
dnegu v0 # error
sd t1, PT_R0(sp) # save it for syscall restarting
1: sd v0, PT_R2(sp) # result
+#if defined(CONFIG_KVM_MIPSVZ) && defined(CONFIG_FAST_ACCESS_TO_THREAD_POINTER)
+ sd t2, PT_R26(sp)
+#endif
n64_syscall_exit:
j syscall_exit_partial
@@ -93,6 +99,9 @@ syscall_trace_entry:
jalr t0
li t0, -EMAXERRNO - 1 # error?
+#if defined(CONFIG_KVM_MIPSVZ) && defined(CONFIG_FAST_ACCESS_TO_THREAD_POINTER)
+ ld t2, TI_TP_VALUE($28)
+#endif
sltu t0, t0, v0
sd t0, PT_R7(sp) # set error flag
beqz t0, 1f
@@ -101,6 +110,9 @@ syscall_trace_entry:
dnegu v0 # error
sd t1, PT_R0(sp) # save it for syscall restarting
1: sd v0, PT_R2(sp) # result
+#if defined(CONFIG_KVM_MIPSVZ) && defined(CONFIG_FAST_ACCESS_TO_THREAD_POINTER)
+ sd t2, PT_R26(sp)
+#endif
j syscall_exit
diff --git a/arch/mips/kernel/scall64-n32.S b/arch/mips/kernel/scall64-n32.S
index edcb659..cba35b4 100644
--- a/arch/mips/kernel/scall64-n32.S
+++ b/arch/mips/kernel/scall64-n32.S
@@ -55,6 +55,9 @@ NESTED(handle_sysn32, PT_SIZE, sp)
jalr t2 # Do The Real Thing (TM)
li t0, -EMAXERRNO - 1 # error?
+#if defined(CONFIG_KVM_MIPSVZ) && defined(CONFIG_FAST_ACCESS_TO_THREAD_POINTER)
+ ld t2, TI_TP_VALUE($28)
+#endif
sltu t0, t0, v0
sd t0, PT_R7(sp) # set error flag
beqz t0, 1f
@@ -63,6 +66,9 @@ NESTED(handle_sysn32, PT_SIZE, sp)
dnegu v0 # error
sd t1, PT_R0(sp) # save it for syscall restarting
1: sd v0, PT_R2(sp) # result
+#if defined(CONFIG_KVM_MIPSVZ) && defined(CONFIG_FAST_ACCESS_TO_THREAD_POINTER)
+ sd t2, PT_R26(sp)
+#endif
j syscall_exit_partial
@@ -85,6 +91,9 @@ n32_syscall_trace_entry:
jalr t0
li t0, -EMAXERRNO - 1 # error?
+#if defined(CONFIG_KVM_MIPSVZ) && defined(CONFIG_FAST_ACCESS_TO_THREAD_POINTER)
+ ld t2, TI_TP_VALUE($28)
+#endif
sltu t0, t0, v0
sd t0, PT_R7(sp) # set error flag
beqz t0, 1f
@@ -93,6 +102,9 @@ n32_syscall_trace_entry:
dnegu v0 # error
sd t1, PT_R0(sp) # save it for syscall restarting
1: sd v0, PT_R2(sp) # result
+#if defined(CONFIG_KVM_MIPSVZ) && defined(CONFIG_FAST_ACCESS_TO_THREAD_POINTER)
+ sd t2, PT_R26(sp)
+#endif
j syscall_exit
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index e3be670..f008795 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -1483,6 +1483,11 @@ void __init *set_except_vector(int n, void *addr)
#endif
u32 *buf = (u32 *)(ebase + 0x200);
unsigned int k0 = 26;
+#ifdef CONFIG_KVM_MIPSVZ
+ unsigned int k1 = 27;
+ UASM_i_MTC0(&buf, k0, 31, 2);
+ UASM_i_MTC0(&buf, k1, 31, 3);
+#endif
if ((handler & jump_mask) == ((ebase + 0x200) & jump_mask)) {
uasm_i_j(&buf, handler & ~jump_mask);
uasm_i_nop(&buf);
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c
index 001b87c..3ce7208 100644
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -372,11 +372,19 @@ static void __cpuinit build_restore_work_registers(u32 **p)
{
if (scratch_reg > 0) {
UASM_i_MFC0(p, 1, 31, scratch_reg);
+#ifdef CONFIG_KVM_MIPSVZ
+ UASM_i_MFC0(p, K0, 31, 2);
+ UASM_i_MFC0(p, K1, 31, 3);
+#endif
return;
}
/* K0 already points to save area, restore $1 and $2 */
UASM_i_LW(p, 1, offsetof(struct tlb_reg_save, a), K0);
UASM_i_LW(p, 2, offsetof(struct tlb_reg_save, b), K0);
+#ifdef CONFIG_KVM_MIPSVZ
+ UASM_i_MFC0(p, K0, 31, 2);
+ UASM_i_MFC0(p, K1, 31, 3);
+#endif
}
#ifndef CONFIG_MIPS_PGD_C0_CONTEXT
@@ -1089,6 +1097,11 @@ build_fast_tlb_refill_handler (u32 **p, struct uasm_label **l,
int vmalloc_branch_delay_filled = 0;
const int scratch = 1; /* Our extra working register */
+#ifdef CONFIG_KVM_MIPSVZ
+ UASM_i_MTC0(p, K0, 31, 2);
+ UASM_i_MTC0(p, K1, 31, 3);
+#endif
+
rv.huge_pte = scratch;
rv.restore_scratch = 0;
@@ -1244,6 +1257,10 @@ build_fast_tlb_refill_handler (u32 **p, struct uasm_label **l,
rv.restore_scratch = 1;
}
+#ifdef CONFIG_KVM_MIPSVZ
+ UASM_i_MFC0(p, K0, 31, 2);
+ UASM_i_MFC0(p, K1, 31, 3);
+#endif
uasm_i_eret(p); /* return from trap */
return rv;
@@ -1277,6 +1294,10 @@ static void __cpuinit build_r4000_tlb_refill_handler(void)
scratch_reg);
vmalloc_mode = refill_scratch;
} else {
+#ifdef CONFIG_KVM_MIPSVZ
+ UASM_i_MTC0(&p, K0, 31, 2);
+ UASM_i_MTC0(&p, K1, 31, 3);
+#endif
htlb_info.huge_pte = K0;
htlb_info.restore_scratch = 0;
vmalloc_mode = refill_noscratch;
@@ -1311,6 +1332,10 @@ static void __cpuinit build_r4000_tlb_refill_handler(void)
build_update_entries(&p, K0, K1);
build_tlb_write_entry(&p, &l, &r, tlb_random);
uasm_l_leave(&l, p);
+#ifdef CONFIG_KVM_MIPSVZ
+ UASM_i_MFC0(&p, K0, 31, 2);
+ UASM_i_MFC0(&p, K1, 31, 3);
+#endif
uasm_i_eret(&p); /* return from trap */
}
#ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT
--
1.7.11.7
next prev parent reply other threads:[~2013-06-07 23:13 UTC|newest]
Thread overview: 81+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-06-07 23:03 [PATCH 00/31] KVM/MIPS: Implement hardware virtualization via the MIPS-VZ extensions David Daney
2013-06-07 23:03 ` [PATCH 01/31] MIPS: Move allocate_kscratch to cpu-probe.c and make it public David Daney
2013-06-14 11:41 ` Ralf Baechle
2013-06-14 13:11 ` Ralf Baechle
2013-06-07 23:03 ` David Daney [this message]
2013-06-07 23:03 ` [PATCH 03/31] mips/kvm: Fix 32-bitisms in kvm_locore.S David Daney
2013-06-14 13:09 ` Ralf Baechle
2013-06-14 13:21 ` Sergei Shtylyov
2013-06-07 23:03 ` [PATCH 04/31] mips/kvm: Add casts to avoid pointer width mismatch build failures David Daney
2013-06-14 13:14 ` Ralf Baechle
2013-06-07 23:03 ` [PATCH 05/31] mips/kvm: Use generic cache flushing functions David Daney
2013-06-14 13:17 ` Ralf Baechle
2013-06-07 23:03 ` [PATCH 06/31] mips/kvm: Rename kvm_vcpu_arch.pc to kvm_vcpu_arch.epc David Daney
2013-06-14 13:18 ` Ralf Baechle
2013-06-07 23:03 ` [PATCH 07/31] mips/kvm: Rename VCPU_registername to KVM_VCPU_ARCH_registername David Daney
2013-06-14 13:18 ` Ralf Baechle
2013-06-07 23:03 ` [PATCH 08/31] mips/kvm: Fix code formatting in arch/mips/kvm/kvm_locore.S David Daney
2013-06-14 13:21 ` Ralf Baechle
2013-06-07 23:03 ` [PATCH 09/31] mips/kvm: Factor trap-and-emulate support into a pluggable implementation David Daney
2013-06-14 13:22 ` Ralf Baechle
2013-06-07 23:03 ` [PATCH 10/31] mips/kvm: Implement ioctls to get and set FPU registers David Daney
2013-06-14 16:11 ` Ralf Baechle
2013-06-07 23:03 ` [PATCH 11/31] MIPS: Rearrange branch.c so it can be used by kvm code David Daney
2013-06-14 22:03 ` Ralf Baechle
2013-06-07 23:03 ` [PATCH 12/31] MIPS: Add instruction format information for WAIT, MTC0, MFC0, et al David Daney
2013-06-14 22:07 ` Ralf Baechle
2013-06-07 23:03 ` [PATCH 13/31] mips/kvm: Add accessors for MIPS VZ registers David Daney
2013-06-14 22:10 ` Ralf Baechle
2013-06-07 23:03 ` [PATCH 14/31] mips/kvm: Add thread_info flag to indicate operation in MIPS VZ Guest Mode David Daney
2013-06-14 22:10 ` Ralf Baechle
2013-06-07 23:03 ` [PATCH 15/31] mips/kvm: Exception handling to leave and reenter guest mode David Daney
2013-06-15 10:00 ` Ralf Baechle
2013-10-11 12:51 ` James Hogan
2013-06-07 23:03 ` [PATCH 16/31] mips/kvm: Add exception handler for MIPSVZ Guest exceptions David Daney
2013-06-15 10:23 ` Ralf Baechle
2013-06-07 23:03 ` [PATCH 17/31] MIPS: Quit exposing Kconfig symbols in uapi headers David Daney
2013-06-14 11:12 ` Ralf Baechle
2013-06-15 17:13 ` Paolo Bonzini
2013-06-07 23:03 ` [PATCH 18/31] mips/kvm: Add pt_regs slots for BadInstr and BadInstrP David Daney
2013-06-15 10:25 ` Ralf Baechle
2013-06-07 23:03 ` [PATCH 19/31] mips/kvm: Add host definitions for MIPS VZ based host David Daney
2013-06-16 8:49 ` Ralf Baechle
2013-06-07 23:03 ` [PATCH 20/31] mips/kvm: Hook into TLB fault handlers David Daney
2013-06-07 23:34 ` Sergei Shtylyov
2013-06-08 0:15 ` David Daney
2013-06-16 8:51 ` Ralf Baechle
2013-06-07 23:03 ` [PATCH 21/31] mips/kvm: Allow set_except_vector() to be used from MIPSVZ code David Daney
2013-06-16 11:22 ` Ralf Baechle
2013-06-07 23:03 ` [PATCH 22/31] mips/kvm: Split get_new_mmu_context into two parts David Daney
2013-06-16 11:26 ` Ralf Baechle
2013-06-07 23:03 ` [PATCH 23/31] mips/kvm: Hook into CP unusable exception handler David Daney
2013-06-16 11:28 ` Ralf Baechle
2013-06-07 23:03 ` [PATCH 24/31] mips/kvm: Add thread_struct fields used by MIPSVZ hosts David Daney
2013-06-16 11:29 ` Ralf Baechle
2013-06-07 23:03 ` [PATCH 25/31] mips/kvm: Add some asm-offsets constants used by MIPSVZ David Daney
2013-06-16 11:31 ` Ralf Baechle
2013-08-06 17:23 ` David Daney
2013-06-07 23:03 ` [PATCH 26/31] mips/kvm: Split up Kconfig and Makefile definitions in preperation for MIPSVZ David Daney
2013-06-16 11:33 ` Ralf Baechle
2013-06-07 23:03 ` [PATCH 27/31] mips/kvm: Gate the use of kvm_local_flush_tlb_all() by KVM_MIPSTE David Daney
2013-06-16 11:42 ` Ralf Baechle
2013-06-07 23:03 ` [PATCH 28/31] mips/kvm: Only use KVM_COALESCED_MMIO_PAGE_OFFSET with KVM_MIPSTE David Daney
2013-06-16 12:03 ` Ralf Baechle
2013-06-07 23:03 ` [PATCH 29/31] mips/kvm: Add MIPSVZ support David Daney
2013-06-16 11:47 ` Ralf Baechle
2013-06-07 23:03 ` [PATCH 30/31] mips/kvm: Enable MIPSVZ in Kconfig/Makefile David Daney
2013-06-16 11:44 ` Ralf Baechle
2013-06-07 23:03 ` [PATCH 31/31] mips/kvm: Allow for upto 8 KVM vcpus per vm David Daney
2013-06-16 11:37 ` Ralf Baechle
2013-06-07 23:15 ` [PATCH 00/31] KVM/MIPS: Implement hardware virtualization via the MIPS-VZ extensions David Daney
2013-06-09 7:31 ` Gleb Natapov
2013-06-09 23:23 ` David Daney
2013-06-09 23:40 ` Maciej W. Rozycki
2013-06-10 11:16 ` Ralf Baechle
2013-06-10 6:18 ` Gleb Natapov
2013-06-10 16:37 ` Sanjay Lal
2013-06-16 11:59 ` Ralf Baechle
2013-06-10 16:43 ` Sanjay Lal
2013-06-10 17:14 ` David Daney
2013-06-14 11:12 ` Ralf Baechle
2013-06-19 9:06 ` Ralf Baechle
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