From: Stephane Eranian <eranian@google.com>
To: linux-kernel@vger.kernel.org
Cc: peterz@infradead.org, mingo@elte.hu, ak@linux.intel.com,
jolsa@redhat.com, kan.liang@intel.com, bp@alien8.de,
maria.n.dimakopoulou@gmail.com
Subject: [PATCH v2 01/12] perf,x86: rename er_flags to flags
Date: Thu, 9 Oct 2014 18:34:35 +0200 [thread overview]
Message-ID: <1412872486-2930-2-git-send-email-eranian@google.com> (raw)
In-Reply-To: <1412872486-2930-1-git-send-email-eranian@google.com>
Because it will be used for more than just
tracking the presence of extra registers.
Reviewed-by: Maria Dimakopoulou <maria.n.dimakopoulou@gmail.com>
Signed-off-by: Stephane Eranian <eranian@google.com>
---
arch/x86/kernel/cpu/perf_event.h | 9 ++++++---
arch/x86/kernel/cpu/perf_event_intel.c | 24 ++++++++++++------------
2 files changed, 18 insertions(+), 15 deletions(-)
diff --git a/arch/x86/kernel/cpu/perf_event.h b/arch/x86/kernel/cpu/perf_event.h
index d98a34d..8af5010 100644
--- a/arch/x86/kernel/cpu/perf_event.h
+++ b/arch/x86/kernel/cpu/perf_event.h
@@ -502,7 +502,7 @@ struct x86_pmu {
* Extra registers for events
*/
struct extra_reg *extra_regs;
- unsigned int er_flags;
+ unsigned int flags;
/*
* Intel host/guest support (KVM)
@@ -519,8 +519,11 @@ do { \
x86_pmu.quirks = &__quirk; \
} while (0)
-#define ERF_NO_HT_SHARING 1
-#define ERF_HAS_RSP_1 2
+/*
+ * x86_pmu flags
+ */
+#define PMU_FL_NO_HT_SHARING 0x1 /* no hyper-threading resource sharing */
+#define PMU_FL_HAS_RSP_1 0x2 /* has 2 equivalent offcore_rsp regs */
#define EVENT_VAR(_id) event_attr_##_id
#define EVENT_PTR(_id) &event_attr_##_id.attr.attr
diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c
index 3851def..9f79da7 100644
--- a/arch/x86/kernel/cpu/perf_event_intel.c
+++ b/arch/x86/kernel/cpu/perf_event_intel.c
@@ -1593,7 +1593,7 @@ intel_bts_constraints(struct perf_event *event)
static int intel_alt_er(int idx)
{
- if (!(x86_pmu.er_flags & ERF_HAS_RSP_1))
+ if (!(x86_pmu.flags & PMU_FL_HAS_RSP_1))
return idx;
if (idx == EXTRA_REG_RSP_0)
@@ -2157,7 +2157,7 @@ static void intel_pmu_cpu_starting(int cpu)
if (!cpuc->shared_regs)
return;
- if (!(x86_pmu.er_flags & ERF_NO_HT_SHARING)) {
+ if (!(x86_pmu.flags & PMU_FL_NO_HT_SHARING)) {
for_each_cpu(i, topology_thread_cpumask(cpu)) {
struct intel_shared_regs *pc;
@@ -2589,7 +2589,7 @@ __init int intel_pmu_init(void)
x86_pmu.event_constraints = intel_slm_event_constraints;
x86_pmu.pebs_constraints = intel_slm_pebs_event_constraints;
x86_pmu.extra_regs = intel_slm_extra_regs;
- x86_pmu.er_flags |= ERF_HAS_RSP_1;
+ x86_pmu.flags |= PMU_FL_HAS_RSP_1;
pr_cont("Silvermont events, ");
break;
@@ -2607,7 +2607,7 @@ __init int intel_pmu_init(void)
x86_pmu.enable_all = intel_pmu_nhm_enable_all;
x86_pmu.pebs_constraints = intel_westmere_pebs_event_constraints;
x86_pmu.extra_regs = intel_westmere_extra_regs;
- x86_pmu.er_flags |= ERF_HAS_RSP_1;
+ x86_pmu.flags |= PMU_FL_HAS_RSP_1;
x86_pmu.cpu_events = nhm_events_attrs;
@@ -2639,8 +2639,8 @@ __init int intel_pmu_init(void)
else
x86_pmu.extra_regs = intel_snb_extra_regs;
/* all extra regs are per-cpu when HT is on */
- x86_pmu.er_flags |= ERF_HAS_RSP_1;
- x86_pmu.er_flags |= ERF_NO_HT_SHARING;
+ x86_pmu.flags |= PMU_FL_HAS_RSP_1;
+ x86_pmu.flags |= PMU_FL_NO_HT_SHARING;
x86_pmu.cpu_events = snb_events_attrs;
@@ -2674,8 +2674,8 @@ __init int intel_pmu_init(void)
else
x86_pmu.extra_regs = intel_snb_extra_regs;
/* all extra regs are per-cpu when HT is on */
- x86_pmu.er_flags |= ERF_HAS_RSP_1;
- x86_pmu.er_flags |= ERF_NO_HT_SHARING;
+ x86_pmu.flags |= PMU_FL_HAS_RSP_1;
+ x86_pmu.flags |= PMU_FL_NO_HT_SHARING;
x86_pmu.cpu_events = snb_events_attrs;
@@ -2702,8 +2702,8 @@ __init int intel_pmu_init(void)
x86_pmu.extra_regs = intel_snbep_extra_regs;
x86_pmu.pebs_aliases = intel_pebs_aliases_snb;
/* all extra regs are per-cpu when HT is on */
- x86_pmu.er_flags |= ERF_HAS_RSP_1;
- x86_pmu.er_flags |= ERF_NO_HT_SHARING;
+ x86_pmu.flags |= PMU_FL_HAS_RSP_1;
+ x86_pmu.flags |= PMU_FL_NO_HT_SHARING;
x86_pmu.hw_config = hsw_hw_config;
x86_pmu.get_event_constraints = hsw_get_event_constraints;
@@ -2724,8 +2724,8 @@ __init int intel_pmu_init(void)
x86_pmu.extra_regs = intel_snbep_extra_regs;
x86_pmu.pebs_aliases = intel_pebs_aliases_snb;
/* all extra regs are per-cpu when HT is on */
- x86_pmu.er_flags |= ERF_HAS_RSP_1;
- x86_pmu.er_flags |= ERF_NO_HT_SHARING;
+ x86_pmu.flags |= PMU_FL_HAS_RSP_1;
+ x86_pmu.flags |= PMU_FL_NO_HT_SHARING;
x86_pmu.hw_config = hsw_hw_config;
x86_pmu.get_event_constraints = hsw_get_event_constraints;
--
1.9.1
next prev parent reply other threads:[~2014-10-09 16:35 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-10-09 16:34 [PATCH v2 0/12] perf/x86: implement HT leak workaround for SNB/IVB/HSW Stephane Eranian
2014-10-09 16:34 ` Stephane Eranian [this message]
2014-10-09 16:34 ` [PATCH v2 02/12] perf/x86: vectorize cpuc->kfree_on_online Stephane Eranian
2014-10-09 16:34 ` [PATCH v2 03/12] perf/x86: add 3 new scheduling callbacks Stephane Eranian
2014-10-09 16:34 ` [PATCH v2 04/12] perf/x86: add index param to get_event_constraint() callback Stephane Eranian
2014-10-09 16:34 ` [PATCH v2 05/12] perf/x86: add cross-HT counter exclusion infrastructure Stephane Eranian
2014-10-21 11:17 ` Peter Zijlstra
2014-10-21 11:18 ` Peter Zijlstra
2014-10-22 15:07 ` Jiri Olsa
2014-10-22 17:25 ` Stephane Eranian
2014-10-23 7:14 ` Jiri Olsa
2014-10-09 16:34 ` [PATCH v2 06/12] perf/x86: implement cross-HT corruption bug workaround Stephane Eranian
2014-10-22 12:31 ` Jiri Olsa
2014-10-23 7:19 ` Jiri Olsa
2014-10-23 8:01 ` Stephane Eranian
2014-10-23 8:13 ` Jiri Olsa
2014-10-09 16:34 ` [PATCH v2 07/12] perf/x86: enforce HT bug workaround for SNB/IVB/HSW Stephane Eranian
2014-10-09 16:34 ` [PATCH v2 08/12] perf/x86: enforce HT bug workaround with PEBS " Stephane Eranian
2014-10-09 16:34 ` [PATCH v2 09/12] perf/x86: fix intel_get_event_constraints() for dynamic constraints Stephane Eranian
2014-10-09 16:34 ` [PATCH v2 10/12] watchdog: add watchdog enable/disable all functions Stephane Eranian
2014-10-09 16:34 ` [PATCH v2 11/12] perf/x86: make HT bug workaround conditioned on HT enabled Stephane Eranian
2014-10-22 13:27 ` Jiri Olsa
2014-10-22 14:36 ` Stephane Eranian
2014-10-22 14:58 ` Jiri Olsa
2014-10-22 16:42 ` Stephane Eranian
2014-10-09 16:34 ` [PATCH v2 12/12] perf/x86: add syfs entry to disable HT bug workaround Stephane Eranian
2014-10-21 11:25 ` [PATCH v2 0/12] perf/x86: implement HT leak workaround for SNB/IVB/HSW Peter Zijlstra
2014-10-21 12:28 ` Stephane Eranian
2014-10-21 13:03 ` Peter Zijlstra
2014-10-21 13:08 ` Stephane Eranian
2014-10-22 9:12 ` Peter Zijlstra
2014-10-22 21:04 ` Stephane Eranian
2014-10-23 8:53 ` Peter Zijlstra
2014-10-23 8:57 ` Stephane Eranian
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