From: Grzegorz Andrejczuk <grzegorz.andrejczuk@intel.com>
To: tglx@linutronix.de, mingo@redhat.com, hpa@zytor.com, x86@kernel.org
Cc: bp@suse.de, dave.hansen@linux.intel.com,
linux-kernel@vger.kernel.org, lukasz.daniluk@intel.com,
james.h.cownie@intel.com,
Grzegorz Andrejczuk <grzegorz.andrejczuk@intel.com>
Subject: [PATCH v1 1/4] Add R3MWAIT register and bit to msr-info.h
Date: Wed, 12 Oct 2016 12:13:07 +0200 [thread overview]
Message-ID: <1476267190-2303-2-git-send-email-grzegorz.andrejczuk@intel.com> (raw)
In-Reply-To: <1476267190-2303-1-git-send-email-grzegorz.andrejczuk@intel.com>
Intel Xeon Phi x200 (codenamed Knights Landing) has MSR
MISC_THD_FEATURE_ENABLE 0x140.
Setting its 2nd bit make MONITOR and MWAIT instructions do not cause
invalid-opcode exception.
This commit adds this register prefixed by PHI and bit to msr-info.h
Reference:
https://software.intel.com/en-us/blogs/2016/10/06/intel-xeon-phi-product-family-x200-knl-user-mode-ring-3-monitor-and-mwait
Change-Id: If3b14c78f4e66d734e5a00921023a8c7cafc0cf3
Signed-off-by: Grzegorz Andrejczuk <grzegorz.andrejczuk@intel.com>
---
arch/x86/include/asm/msr-index.h | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
index 56f4c66..3eb1713 100644
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -540,6 +540,11 @@
#define MSR_IA32_MISC_ENABLE_IP_PREF_DISABLE_BIT 39
#define MSR_IA32_MISC_ENABLE_IP_PREF_DISABLE (1ULL << MSR_IA32_MISC_ENABLE_IP_PREF_DISABLE_BIT)
+/* Intel Xeon Phi x200 ring 3 MONITOR/MWAIT */
+#define MSR_PHI_MISC_THD_FEATURE_ENABLE 0x00000140
+#define MSR_PHI_MISC_THD_FEATURE_ENABLE_R3MWAIT_BIT 1
+#define MSR_PHI_MISC_THD_FEATURE_ENABLE_R3MWAIT (1ULL << MSR_PHI_MISC_THD_FEATURE_ENABLE_R3MWAIT_BIT)
+
#define MSR_IA32_TSC_DEADLINE 0x000006E0
/* P4/Xeon+ specific */
--
2.5.1
next prev parent reply other threads:[~2016-10-12 10:14 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-10-12 10:13 [PATCH v1 0/4] Enabling Ring 3 MONITOR/MWAIT feature for Knights Landing Grzegorz Andrejczuk
2016-10-12 10:13 ` Grzegorz Andrejczuk [this message]
2016-10-12 10:13 ` [PATCH v1 2/4] Add enabling of the R3 MWAIT during boot for KNL Grzegorz Andrejczuk
2016-10-12 10:36 ` Borislav Petkov
2016-10-12 10:13 ` [PATCH v1 3/4] Add hwcap2 for x86 Grzegorz Andrejczuk
2016-10-12 10:23 ` [PATCH " Grzegorz Andrejczuk
2016-10-12 10:13 ` [PATCH v1 4/4] Add R3MWAIT to CPU features Grzegorz Andrejczuk
2016-10-12 10:32 ` Borislav Petkov
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