From: Suzuki K Poulose <suzuki.poulose@arm.com>
To: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org, mathieu.poirier@linaro.org,
mike.leach@linaro.org, Suzuki K Poulose <suzuki.poulose@arm.com>,
Linus Walleij <linus.walleij@linaro.org>
Subject: [PATCH v5 05/19] coresight: Extend the PIDR mask to cover relevant bits in PIDR2
Date: Thu, 20 Jul 2017 11:17:15 +0100 [thread overview]
Message-ID: <1500545849-23724-6-git-send-email-suzuki.poulose@arm.com> (raw)
In-Reply-To: <1500545849-23724-1-git-send-email-suzuki.poulose@arm.com>
As per coresight standards, PIDR2 register has the following format :
[2-0] - JEP106_bits6to4
[3] - JEDEC, designer ID is specified by JEDEC.
However some of the drivers only use mask of 0x3 for the PIDR2 leaving
bits [3-2] unchecked, which could potentially match the component for
a different device altogether. This patch fixes the mask and the
corresponding id bits for the existing devices.
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
---
.../coresight/coresight-dynamic-replicator.c | 4 ++--
drivers/hwtracing/coresight/coresight-etb10.c | 4 ++--
drivers/hwtracing/coresight/coresight-etm3x.c | 24 +++++++++++-----------
drivers/hwtracing/coresight/coresight-funnel.c | 4 ++--
drivers/hwtracing/coresight/coresight-stm.c | 8 ++++----
drivers/hwtracing/coresight/coresight-tmc.c | 4 ++--
drivers/hwtracing/coresight/coresight-tpiu.c | 4 ++--
7 files changed, 26 insertions(+), 26 deletions(-)
diff --git a/drivers/hwtracing/coresight/coresight-dynamic-replicator.c b/drivers/hwtracing/coresight/coresight-dynamic-replicator.c
index c6900f2..f8bf995 100644
--- a/drivers/hwtracing/coresight/coresight-dynamic-replicator.c
+++ b/drivers/hwtracing/coresight/coresight-dynamic-replicator.c
@@ -176,8 +176,8 @@ static const struct dev_pm_ops replicator_dev_pm_ops = {
static struct amba_id replicator_ids[] = {
{
- .id = 0x0003b909,
- .mask = 0x0003ffff,
+ .id = 0x000bb909,
+ .mask = 0x000fffff,
},
{ 0, 0 },
};
diff --git a/drivers/hwtracing/coresight/coresight-etb10.c b/drivers/hwtracing/coresight/coresight-etb10.c
index d0d1865..9b6cb0a 100644
--- a/drivers/hwtracing/coresight/coresight-etb10.c
+++ b/drivers/hwtracing/coresight/coresight-etb10.c
@@ -748,8 +748,8 @@ static const struct dev_pm_ops etb_dev_pm_ops = {
static struct amba_id etb_ids[] = {
{
- .id = 0x0003b907,
- .mask = 0x0003ffff,
+ .id = 0x000bb907,
+ .mask = 0x000fffff,
},
{ 0, 0},
};
diff --git a/drivers/hwtracing/coresight/coresight-etm3x.c b/drivers/hwtracing/coresight/coresight-etm3x.c
index 9c010eb..c6f0998 100644
--- a/drivers/hwtracing/coresight/coresight-etm3x.c
+++ b/drivers/hwtracing/coresight/coresight-etm3x.c
@@ -901,33 +901,33 @@ static const struct dev_pm_ops etm_dev_pm_ops = {
static struct amba_id etm_ids[] = {
{ /* ETM 3.3 */
- .id = 0x0003b921,
- .mask = 0x0003ffff,
+ .id = 0x000bb921,
+ .mask = 0x000fffff,
.data = "ETM 3.3",
},
{ /* ETM 3.5 - Cortex-A5 */
- .id = 0x0003b955,
- .mask = 0x0003ffff,
+ .id = 0x000bb955,
+ .mask = 0x000fffff,
.data = "ETM 3.5",
},
{ /* ETM 3.5 */
- .id = 0x0003b956,
- .mask = 0x0003ffff,
+ .id = 0x000bb956,
+ .mask = 0x000fffff,
.data = "ETM 3.5",
},
{ /* PTM 1.0 */
- .id = 0x0003b950,
- .mask = 0x0003ffff,
+ .id = 0x000bb950,
+ .mask = 0x000fffff,
.data = "PTM 1.0",
},
{ /* PTM 1.1 */
- .id = 0x0003b95f,
- .mask = 0x0003ffff,
+ .id = 0x000bb95f,
+ .mask = 0x000fffff,
.data = "PTM 1.1",
},
{ /* PTM 1.1 Qualcomm */
- .id = 0x0003006f,
- .mask = 0x0003ffff,
+ .id = 0x000b006f,
+ .mask = 0x000fffff,
.data = "PTM 1.1",
},
{ 0, 0},
diff --git a/drivers/hwtracing/coresight/coresight-funnel.c b/drivers/hwtracing/coresight/coresight-funnel.c
index 860fe6e..6f7f3d3 100644
--- a/drivers/hwtracing/coresight/coresight-funnel.c
+++ b/drivers/hwtracing/coresight/coresight-funnel.c
@@ -248,8 +248,8 @@ static const struct dev_pm_ops funnel_dev_pm_ops = {
static struct amba_id funnel_ids[] = {
{
- .id = 0x0003b908,
- .mask = 0x0003ffff,
+ .id = 0x000bb908,
+ .mask = 0x000fffff,
},
{ 0, 0},
};
diff --git a/drivers/hwtracing/coresight/coresight-stm.c b/drivers/hwtracing/coresight/coresight-stm.c
index 93fc26f..1bcda80 100644
--- a/drivers/hwtracing/coresight/coresight-stm.c
+++ b/drivers/hwtracing/coresight/coresight-stm.c
@@ -916,13 +916,13 @@ static const struct dev_pm_ops stm_dev_pm_ops = {
static struct amba_id stm_ids[] = {
{
- .id = 0x0003b962,
- .mask = 0x0003ffff,
+ .id = 0x000bb962,
+ .mask = 0x000fffff,
.data = "STM32",
},
{
- .id = 0x0003b963,
- .mask = 0x0003ffff,
+ .id = 0x000bb963,
+ .mask = 0x000fffff,
.data = "STM500",
},
{ 0, 0},
diff --git a/drivers/hwtracing/coresight/coresight-tmc.c b/drivers/hwtracing/coresight/coresight-tmc.c
index 8644887..eb0c7b3 100644
--- a/drivers/hwtracing/coresight/coresight-tmc.c
+++ b/drivers/hwtracing/coresight/coresight-tmc.c
@@ -393,8 +393,8 @@ static int tmc_probe(struct amba_device *adev, const struct amba_id *id)
static struct amba_id tmc_ids[] = {
{
- .id = 0x0003b961,
- .mask = 0x0003ffff,
+ .id = 0x000bb961,
+ .mask = 0x000fffff,
},
{ 0, 0},
};
diff --git a/drivers/hwtracing/coresight/coresight-tpiu.c b/drivers/hwtracing/coresight/coresight-tpiu.c
index 0673baf..59c1510 100644
--- a/drivers/hwtracing/coresight/coresight-tpiu.c
+++ b/drivers/hwtracing/coresight/coresight-tpiu.c
@@ -194,8 +194,8 @@ static const struct dev_pm_ops tpiu_dev_pm_ops = {
static struct amba_id tpiu_ids[] = {
{
- .id = 0x0003b912,
- .mask = 0x0003ffff,
+ .id = 0x000bb912,
+ .mask = 0x000fffff,
},
{
.id = 0x0004b912,
--
2.7.5
next prev parent reply other threads:[~2017-07-20 10:22 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-07-20 10:17 [PATCH v5 00/19] coresight: Support for ARM Coresight SoC-600 Suzuki K Poulose
2017-07-20 10:17 ` [PATCH v5 01/19] coresight replicator: Cleanup programmable replicator naming Suzuki K Poulose
2017-07-20 10:17 ` [PATCH v5 02/19] arm64: juno: dts: Use the new coresight replicator string Suzuki K Poulose
2017-07-20 12:57 ` Liviu Dudau
2017-07-27 11:23 ` Sudeep Holla
2017-07-20 10:17 ` [PATCH v5 03/19] arm: qcom-msm8974: dts: Update coresight replicator Suzuki K Poulose
2017-07-27 11:17 ` Suzuki K Poulose
2017-07-27 21:01 ` Andy Gross
2017-07-20 10:17 ` [PATCH v5 04/19] arm64: qcom-msm8916: " Suzuki K Poulose
2017-07-20 10:17 ` Suzuki K Poulose [this message]
2017-07-20 10:17 ` [PATCH v5 06/19] coresight: Add support for reading 64bit registers Suzuki K Poulose
2017-07-20 10:17 ` [PATCH v5 07/19] coresight: Use the new helper for defining registers Suzuki K Poulose
2017-07-20 10:17 ` [PATCH v5 08/19] coresight tmc: Add helpers for accessing 64bit registers Suzuki K Poulose
2017-07-24 17:11 ` Mathieu Poirier
2017-07-25 9:29 ` Suzuki K Poulose
2017-07-20 10:17 ` [PATCH v5 09/19] coresight tmc: Expose DBA and AXICTL Suzuki K Poulose
2017-07-20 10:17 ` [PATCH v5 10/19] coresight replicator: Expose replicator management registers Suzuki K Poulose
2017-07-20 10:17 ` [PATCH v5 11/19] coresight tmc: Handle configuration types properly Suzuki K Poulose
2017-07-20 10:17 ` [PATCH v5 12/19] coresight tmc etr: Add capabilitiy information Suzuki K Poulose
2017-07-20 10:17 ` [PATCH v5 13/19] coresight tmc: Detect support for scatter gather Suzuki K Poulose
2017-07-20 10:17 ` [PATCH v5 14/19] coresight tmc etr: Detect address width at runtime Suzuki K Poulose
2017-07-20 10:17 ` [PATCH v5 15/19] coresight tmc etr: Cleanup AXICTL register handling Suzuki K Poulose
2017-07-20 10:17 ` [PATCH v5 16/19] coresigh tmc etr: Setup AXI cache encoding for read transfers Suzuki K Poulose
2017-07-20 10:17 ` [PATCH v5 17/19] coresight tmc: Support for save-restore in ETR Suzuki K Poulose
2017-07-20 10:17 ` [PATCH v5 18/19] coresight tmc: Add support for Coresight SoC 600 TMC Suzuki K Poulose
2017-07-24 17:12 ` Mathieu Poirier
2017-07-25 9:35 ` Suzuki K Poulose
2017-07-20 10:17 ` [PATCH v5 19/19] coresight: Add support for Coresight SoC 600 components Suzuki K Poulose
2017-07-24 17:15 ` [PATCH v5 00/19] coresight: Support for ARM Coresight SoC-600 Mathieu Poirier
2017-07-25 9:40 ` Suzuki K Poulose
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