From: Akhil P Oommen <quic_akhilpo@quicinc.com>
To: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>,
<neil.armstrong@linaro.org>
Cc: Konrad Dybcio <konradybcio@kernel.org>,
Rob Clark <robdclark@gmail.com>, Sean Paul <sean@poorly.run>,
Abhinav Kumar <quic_abhinavk@quicinc.com>,
Dmitry Baryshkov <lumag@kernel.org>,
David Airlie <airlied@gmail.com>,
"Simona Vetter" <simona@ffwll.ch>,
Bjorn Andersson <andersson@kernel.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Marijn Suijten <marijn.suijten@somainline.org>,
<linux-arm-msm@vger.kernel.org>,
<dri-devel@lists.freedesktop.org>,
<freedreno@lists.freedesktop.org>, <linux-kernel@vger.kernel.org>,
<devicetree@vger.kernel.org>,
Konrad Dybcio <konrad.dybcio@linaro.org>
Subject: Re: [PATCH RFT v6 2/5] drm/msm/adreno: Add speedbin data for SM8550 / A740
Date: Sun, 11 May 2025 15:21:57 +0530 [thread overview]
Message-ID: <1903ee8a-f819-4a4d-baee-90f35e0da290@quicinc.com> (raw)
In-Reply-To: <d73c6151-91bb-4c96-ad2a-972ad392624b@oss.qualcomm.com>
On 5/1/2025 9:23 PM, Konrad Dybcio wrote:
> On 5/1/25 11:29 AM, Akhil P Oommen wrote:
>> On 4/30/2025 10:26 PM, neil.armstrong@linaro.org wrote:
>>> On 30/04/2025 18:39, Konrad Dybcio wrote:
>>>> On 4/30/25 6:19 PM, neil.armstrong@linaro.org wrote:
>>>>> On 30/04/2025 17:36, Konrad Dybcio wrote:
>>>>>> On 4/30/25 4:49 PM, neil.armstrong@linaro.org wrote:
>>>>>>> On 30/04/2025 15:09, Konrad Dybcio wrote:
>>>>>>>> On 4/30/25 2:49 PM, neil.armstrong@linaro.org wrote:
>>>>>>>>> On 30/04/2025 14:35, Konrad Dybcio wrote:
>>>>>>>>>> On 4/30/25 2:26 PM, neil.armstrong@linaro.org wrote:
>
> [...]
>
>>> This behaves exactly as I said, so please fix it.
>
> Eh, I was so sure I tested things correctly..
>
>>
>> Konrad,
>>
>> iirc, we discussed this in one of the earlier revision. There is a
>> circular dependency between the driver change for SKU support and the dt
>> change that adds supported_hw bitmask in opp-table. Only scenario it
>> works is when you add these to the initial patches series of a new GPU.
>>
>> It will be very useful if we can break this circular dependency.
>
> Right. Let's start with getting that in order
Another complication with the socinfo is that the value is unique for a
chipset, not for a GPU. So, it won't work if we keep this data in GPU
list in the driver.
Downstream solved this problem by keeping the PCODE/FCODE mappings in
the devicetree.
-Akhil.
>
> Konrad
next prev parent reply other threads:[~2025-05-11 9:52 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-30 11:34 [RFT PATCH v6 0/5] Add SMEM-based speedbin matching Konrad Dybcio
2025-04-30 11:34 ` [PATCH RFT v6 1/5] drm/msm/adreno: Implement SMEM-based speed bin Konrad Dybcio
2025-04-30 16:20 ` neil.armstrong
2025-04-30 16:25 ` Konrad Dybcio
2025-04-30 11:34 ` [PATCH RFT v6 2/5] drm/msm/adreno: Add speedbin data for SM8550 / A740 Konrad Dybcio
2025-04-30 12:26 ` neil.armstrong
2025-04-30 12:35 ` Konrad Dybcio
2025-04-30 12:49 ` neil.armstrong
2025-04-30 13:09 ` Konrad Dybcio
2025-04-30 14:49 ` neil.armstrong
2025-04-30 15:36 ` Konrad Dybcio
2025-04-30 16:19 ` neil.armstrong
2025-04-30 16:39 ` Konrad Dybcio
2025-04-30 16:56 ` neil.armstrong
2025-05-01 9:29 ` Akhil P Oommen
2025-05-01 15:53 ` Konrad Dybcio
2025-05-11 9:51 ` Akhil P Oommen [this message]
2025-05-22 16:02 ` Konrad Dybcio
2025-05-22 17:33 ` Rob Clark
2025-04-30 11:34 ` [PATCH RFT v6 3/5] drm/msm/adreno: Define A530 speed bins explicitly Konrad Dybcio
2025-04-30 11:34 ` [PATCH RFT v6 4/5] drm/msm/adreno: Redo the speedbin assignment Konrad Dybcio
2025-04-30 11:34 ` [PATCH RFT v6 5/5] arm64: dts: qcom: sm8550: Wire up GPU speed bin & more OPPs Konrad Dybcio
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