From: Jerome Brunet <jbrunet@baylibre.com>
To: zl020895 <zl020895@163.com>, Linus Walleij <linusw@kernel.org>
Cc: "Greg Kroah-Hartman" <gregkh@linuxfoundation.org>,
longzhao@ambarella.com, "Arnd Bergmann" <arnd@arndb.de>,
"Krzysztof Kozlowski" <krzk@kernel.org>,
"Alexandre Belloni" <alexandre.belloni@bootlin.com>,
soc@lists.linux.dev, linux-arm-kernel@lists.infradead.org,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Michael Turquette" <mturquette@baylibre.com>,
"Stephen Boyd" <sboyd@kernel.org>,
"Bartosz Golaszewski" <brgl@kernel.org>,
"Michael Walle" <mwalle@kernel.org>,
"Jiri Slaby" <jirislaby@kernel.org>,
"Andy Shevchenko" <andriy.shevchenko@linux.intel.com>,
"Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>,
"Catalin Marinas" <catalin.marinas@arm.com>,
"Will Deacon" <will@kernel.org>, "Lee Jones" <lee@kernel.org>,
mfd@lists.linux.dev, devicetree@vger.kernel.org,
linux-clk@vger.kernel.org, linux-gpio@vger.kernel.org,
linux-serial@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re:Re: [PATCH v9 13/15] serial: 8250_dw: add Ambarella CV75 quirks
Date: Fri, 02 Oct 2026 10:09:44 +0200 [thread overview]
Message-ID: <1j1pa834mv.fsf@starbuckisacylon.baylibre.com> (raw)
In-Reply-To: <4405a61f.505.1a0fa675e43.Coremail.zl020895@163.com>
On ven. 02 oct. 2026 at 10:17, zl020895 <zl020895@163.com> wrote:
> Hi Greg, Linus,
>
> Thanks.
>
> This series follows the new-vendor, new-SoC process and is sent
> as one set, so the new Kconfig symbol and the drivers that use it
> land together.
What Greg and Linus say here is basically what I already suggested on
v6 [1]
Giving the whole context of a bring ups, mixing many trees, might be
nice at the RFC stage but then it makes a lot more difficult.
[1]: https://lore.kernel.org/all/1jld986j7m.fsf@starbuckisacylon.baylibre.com/
>
> If it has to be split, the GPIO patches and the UART patches can
> go out as their own series. The SoC patches and the CV75 clock
> driver should stay in one series: the clock Kconfig depends on
> ARCH_AMBARELLA, which is added by the arm64 patch.
>
> Would that split be acceptable for you?
>
I don't get why clock is any different here. Just state your
dependencies in the cover letter. `b4` can help you there as well.
> Best regards,
> Long Zhao
>
> At 2026-10-02 03:20:51, "Linus Walleij" <linusw@kernel.org> wrote:
>>On Thu, Oct 1, 2026 at 2:52 PM Greg Kroah-Hartman
>><gregkh@linuxfoundation.org> wrote:
>>> On Thu, Oct 01, 2026 at 08:41:02PM +0800, Long Zhao via B4 Relay wrote:
>>
>>> > From: Long Zhao <longzhao@ambarella.com>
>>> >
>>> > The Ambarella CV75 UART is Ambarella IP, not a Synopsys DesignWare
>>> > licensed block. At the register level it is close enough to DW APB UART
>>> > that a full custom UART driver is unnecessary: reuse 8250_dw with a
>>> > small platform quirk.
>>> >
>>> > Quirks:
>>> > - keep IER ETOI (bit 5) set for RX timeout behaviour
>>> > - skip set_rate; baud clock is managed outside the UART block
>>> >
>>> > Reviewed-by: Linus Walleij <linusw@kernel.org>
>>> > Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
>>> > Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
>>> > Signed-off-by: Long Zhao <longzhao@ambarella.com>
>>> > ---
>>> > drivers/tty/serial/8250/8250_dw.c | 32 ++++++++++++++++++++++++++++++++
>>> > 1 file changed, 32 insertions(+)
>>>
>>> When you submit lots of different subsystem patches all in one series,
>>> it's hard, if not impossible, for subsystem maintainers to take them :(
>>
>>In my experience people do this in cases like this it is because they
>>essentially dump out their "bring-up" tree, the thing they have
>>booting on the hardware so they know the pieces work together.
>>
>>Long: can you split it up in topic branches and work on e.g. the
>>serial driver on a separate branch?
>>
>>A better way to test the whole set of patces is to just create a
>>mixdown branch where you merge all the topic branched into
>>one "test" branch, then you boot and test this before sending
>>out each branch separately.
>>
>>Each topic branch can be versioned separately with b4.
>>
>>Yours,
>>Linus Walleij
--
Jerome
next prev parent reply other threads:[~2026-10-02 8:09 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-01 12:40 [PATCH v9 00/15] Ambarella CV75 SoC minimal bring-up Long Zhao via B4 Relay
2026-10-01 12:40 ` [PATCH v9 01/15] dt-bindings: arm: add Ambarella CV75 platforms Long Zhao via B4 Relay
2026-10-01 12:40 ` [PATCH v9 02/15] dt-bindings: mfd: syscon: add Ambarella CV75 secure scratchpad Long Zhao via B4 Relay
2026-10-01 12:40 ` [PATCH v9 03/15] dt-bindings: clock: add Ambarella CV75 RCT Long Zhao via B4 Relay
2026-10-01 12:40 ` [PATCH v9 04/15] dt-bindings: gpio: pl061: add Ambarella CV75 variant Long Zhao via B4 Relay
2026-10-01 19:23 ` Conor Dooley
2026-10-01 19:36 ` Linus Walleij
2026-10-01 21:16 ` Conor Dooley
2026-10-01 12:40 ` [PATCH v9 05/15] dt-bindings: serial: snps-dw-apb-uart: add ambarella,cv75-uart Long Zhao via B4 Relay
2026-10-01 12:40 ` [PATCH v9 06/15] clk: ambarella: add CV75 RCT clock controller Long Zhao via B4 Relay
2026-10-02 8:10 ` Andy Shevchenko
2026-10-01 12:40 ` [PATCH v9 07/15] gpiolib: regmap: add GPIO_REGMAP_QUIRK_SET_AFTER_DIR Long Zhao via B4 Relay
2026-10-02 7:41 ` Andy Shevchenko
2026-10-01 12:40 ` [PATCH v9 08/15] gpio: pl061: convert register access to regmap Long Zhao via B4 Relay
2026-10-02 8:26 ` Andy Shevchenko
2026-10-01 12:40 ` [PATCH v9 09/15] gpio: pl061: use IRQ_TYPE_LEVEL_MASK and IRQ_TYPE_EDGE_BOTH Long Zhao via B4 Relay
2026-10-02 9:22 ` Andy Shevchenko
2026-10-01 12:40 ` [PATCH v9 10/15] gpio: pl061: use cleanup helpers for locks Long Zhao via B4 Relay
2026-10-01 12:41 ` [PATCH v9 11/15] gpio: pl061: switch data path to gpio-regmap Long Zhao via B4 Relay
2026-10-01 12:41 ` [PATCH v9 12/15] gpio: pl061: add Ambarella register-layout variant Long Zhao via B4 Relay
2026-10-01 12:41 ` [PATCH v9 13/15] serial: 8250_dw: add Ambarella CV75 quirks Long Zhao via B4 Relay
2026-10-01 12:52 ` Greg Kroah-Hartman
2026-10-01 19:20 ` Linus Walleij
2026-10-02 2:17 ` zl020895
2026-10-02 8:09 ` Jerome Brunet [this message]
2026-10-01 12:41 ` [PATCH v9 14/15] arm64: ambarella: add ARCH_AMBARELLA and CV75 EVK DT Long Zhao via B4 Relay
2026-10-01 12:41 ` [PATCH v9 15/15] MAINTAINERS: add ARM/AMBARELLA SoC support Long Zhao via B4 Relay
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1j1pa834mv.fsf@starbuckisacylon.baylibre.com \
--to=jbrunet@baylibre.com \
--cc=alexandre.belloni@bootlin.com \
--cc=andriy.shevchenko@linux.intel.com \
--cc=arnd@arndb.de \
--cc=brgl@kernel.org \
--cc=catalin.marinas@arm.com \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=gregkh@linuxfoundation.org \
--cc=ilpo.jarvinen@linux.intel.com \
--cc=jirislaby@kernel.org \
--cc=krzk+dt@kernel.org \
--cc=krzk@kernel.org \
--cc=lee@kernel.org \
--cc=linusw@kernel.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-clk@vger.kernel.org \
--cc=linux-gpio@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-serial@vger.kernel.org \
--cc=longzhao@ambarella.com \
--cc=mfd@lists.linux.dev \
--cc=mturquette@baylibre.com \
--cc=mwalle@kernel.org \
--cc=robh@kernel.org \
--cc=sboyd@kernel.org \
--cc=soc@lists.linux.dev \
--cc=will@kernel.org \
--cc=zl020895@163.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®