From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To: longzhao@ambarella.com
Cc: "Arnd Bergmann" <arnd@arndb.de>,
"Krzysztof Kozlowski" <krzk@kernel.org>,
"Alexandre Belloni" <alexandre.belloni@bootlin.com>,
soc@lists.linux.dev, linux-arm-kernel@lists.infradead.org,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Michael Turquette" <mturquette@baylibre.com>,
"Stephen Boyd" <sboyd@kernel.org>,
"Jerome Brunet" <jbrunet@baylibre.com>,
"Linus Walleij" <linusw@kernel.org>,
"Bartosz Golaszewski" <brgl@kernel.org>,
"Michael Walle" <mwalle@kernel.org>,
"Greg Kroah-Hartman" <gregkh@linuxfoundation.org>,
"Jiri Slaby" <jirislaby@kernel.org>,
"Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>,
"Catalin Marinas" <catalin.marinas@arm.com>,
"Will Deacon" <will@kernel.org>, "Long Zhao" <zl020895@163.com>,
"Lee Jones" <lee@kernel.org>,
mfd@lists.linux.dev, devicetree@vger.kernel.org,
linux-clk@vger.kernel.org, linux-gpio@vger.kernel.org,
linux-serial@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v9 07/15] gpiolib: regmap: add GPIO_REGMAP_QUIRK_SET_AFTER_DIR
Date: Fri, 2 Oct 2026 10:41:25 +0300 [thread overview]
Message-ID: <ar9gJRVZxExBwDyn@ashevche-desk.local> (raw)
In-Reply-To: <20261001-cv75-v5-v9-7-486cc289a4b8@ambarella.com>
On Thu, Oct 01, 2026 at 08:40:56PM +0800, Long Zhao via B4 Relay wrote:
> Some controllers ignore output writes while a line is still an input.
> Add a behaviour flag so the output value is written after the direction
> change. This is a legacy quirk. New hardware must not use it.
A nit-pick below.
In general looks good to me.
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
...
> struct gpio_regmap {
> unsigned int reg_clr_base;
> unsigned int reg_dir_in_base;
> unsigned int reg_dir_out_base;
> + unsigned long quirks;
I think I have told at some point that this location is not the best, I woul put it...
> unsigned long *fixed_direction_mask;
> unsigned long *fixed_direction_output;
...here, after the group of the direction related offsets and masks.
> - gpio_regmap_set(chip, offset, value);
> + if (!(gpio->quirks & GPIO_REGMAP_QUIRK_SET_AFTER_DIR))
> + gpio_regmap_set(chip, offset, value);
>
> - return gpio_regmap_set_direction(chip, offset, true);
> + ret = gpio_regmap_set_direction(chip, offset, true);
> + if (ret)
> + return ret;
> +
> + if (gpio->quirks & GPIO_REGMAP_QUIRK_SET_AFTER_DIR)
> + gpio_regmap_set(chip, offset, value);
> +
> + return 0;
> }
...
> /**
> * struct gpio_regmap_config - Description of a generic regmap gpio_chip.
> * @parent: The parent device
> * @ngpio: (Optional) Number of GPIOs
> * @names: (Optional) Array of names for gpios
> + * @quirks: (Optional) Behaviour flags, OR of GPIO_REGMAP_QUIRK_*.
> * @reg_dat_base: (Optional) (in) register base address
> * @reg_set_base: (Optional) set register base address
> * @reg_clr_base: (Optional) clear register base address
> int ngpio;
> const char *const *names;
>
> + /* Regmap GPIO behaviour flags */
> + unsigned long quirks;
> +
> unsigned int reg_dat_base;
> unsigned int reg_set_base;
> unsigned int reg_clr_base;
I would follow the same location as it's in the above struct, id est after
unsigned long *fixed_direction_output;
member.
--
With Best Regards,
Andy Shevchenko
next prev parent reply other threads:[~2026-10-02 7:41 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-01 12:40 [PATCH v9 00/15] Ambarella CV75 SoC minimal bring-up Long Zhao via B4 Relay
2026-10-01 12:40 ` [PATCH v9 01/15] dt-bindings: arm: add Ambarella CV75 platforms Long Zhao via B4 Relay
2026-10-01 12:40 ` [PATCH v9 02/15] dt-bindings: mfd: syscon: add Ambarella CV75 secure scratchpad Long Zhao via B4 Relay
2026-10-01 12:40 ` [PATCH v9 03/15] dt-bindings: clock: add Ambarella CV75 RCT Long Zhao via B4 Relay
2026-10-01 12:40 ` [PATCH v9 04/15] dt-bindings: gpio: pl061: add Ambarella CV75 variant Long Zhao via B4 Relay
2026-10-01 19:23 ` Conor Dooley
2026-10-01 19:36 ` Linus Walleij
2026-10-01 21:16 ` Conor Dooley
2026-10-01 12:40 ` [PATCH v9 05/15] dt-bindings: serial: snps-dw-apb-uart: add ambarella,cv75-uart Long Zhao via B4 Relay
2026-10-01 12:40 ` [PATCH v9 06/15] clk: ambarella: add CV75 RCT clock controller Long Zhao via B4 Relay
2026-10-02 8:10 ` Andy Shevchenko
2026-10-01 12:40 ` [PATCH v9 07/15] gpiolib: regmap: add GPIO_REGMAP_QUIRK_SET_AFTER_DIR Long Zhao via B4 Relay
2026-10-02 7:41 ` Andy Shevchenko [this message]
2026-10-01 12:40 ` [PATCH v9 08/15] gpio: pl061: convert register access to regmap Long Zhao via B4 Relay
2026-10-02 8:26 ` Andy Shevchenko
2026-10-01 12:40 ` [PATCH v9 09/15] gpio: pl061: use IRQ_TYPE_LEVEL_MASK and IRQ_TYPE_EDGE_BOTH Long Zhao via B4 Relay
2026-10-02 9:22 ` Andy Shevchenko
2026-10-01 12:40 ` [PATCH v9 10/15] gpio: pl061: use cleanup helpers for locks Long Zhao via B4 Relay
2026-10-01 12:41 ` [PATCH v9 11/15] gpio: pl061: switch data path to gpio-regmap Long Zhao via B4 Relay
2026-10-01 12:41 ` [PATCH v9 12/15] gpio: pl061: add Ambarella register-layout variant Long Zhao via B4 Relay
2026-10-01 12:41 ` [PATCH v9 13/15] serial: 8250_dw: add Ambarella CV75 quirks Long Zhao via B4 Relay
2026-10-01 12:52 ` Greg Kroah-Hartman
2026-10-01 19:20 ` Linus Walleij
2026-10-02 2:17 ` zl020895
2026-10-02 8:09 ` Jerome Brunet
2026-10-01 12:41 ` [PATCH v9 14/15] arm64: ambarella: add ARCH_AMBARELLA and CV75 EVK DT Long Zhao via B4 Relay
2026-10-01 12:41 ` [PATCH v9 15/15] MAINTAINERS: add ARM/AMBARELLA SoC support Long Zhao via B4 Relay
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