Re: [PATCH v9 04/15] dt-bindings: gpio: pl061: add Ambarella CV75 variant

[Conor Dooley <conor@kernel.org>]

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On Thu, Oct 01, 2026 at 09:36:50PM +0200, Linus Walleij wrote:
> On Thu, Oct 1, 2026 at 9:23 PM Conor Dooley <conor@kernel.org> wrote:
> > On Thu, Oct 01, 2026 at 08:40:53PM +0800, Long Zhao via B4 Relay wrote:
> > > From: Long Zhao <longzhao@ambarella.com>
> > >
> > > The CV75 GPIO banks sit on the AMBA PrimeCell bus but are not
> > > register-compatible with the ARM PL061. Each bank is 32-bit and 32
> > > lines, with extra mask/enable registers, so arm,pl061 must not be used
> > > as a fallback compatible.
> >
> > What has this got in common with the pl061 beyond using the PrimeCell
> > bus? Current reason for putting them together is a bit tenuous to me.
> 
> It was determined in early review that this is very clearly a modified
> PL061 block. The basic registers are even named the same.
> https://lore.kernel.org/linux-arm-kernel/CAD++jLk0LoOJk=TXin42AL3_z_7eVVkvMnYr1S8090C6A_B+dQ@mail.gmail.com/

Right. I think that'd be good to have in the commit message, because as
an outsider reading this it sounds like it could well be an entirely
different device.

With that explanation,
Acked-by: Conor Dooley <conor.dooley@microchip.com>
but as things stand,
pw-bot: changes-requested

Thanks,
Conor.

> 
> PL061 is different and quirky and could not use gpio-mmio, while
> with these changes to gpio-regmap it can handle its pecularities
> and use a library which is a good thing on its own.
> 
> Yours,
> Linus Walleij

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