Re: [PATCH 18/18] 2.6.17.9 perfmon2 patch for review: new x86_64 files

[Stephane Eranian <eranian@hpl.hp.com>]

Andi,

On Wed, Aug 23, 2006 at 02:29:04PM +0200, Andi Kleen wrote:
> On Wednesday 23 August 2006 14:14, Stephane Eranian wrote:
> 
> > On Wed, Aug 23, 2006 at 01:22:44PM +0200, Andi Kleen wrote:
> > > 
> > > > I have a second thought on this. AMD has architected the performance counters.
> > > 
> > > Quote:
> > > >>
> > > Implementations are not required to support the performance
> > > c o u n t e rs and the event-select registers, or the time-stamp
> > > counter. The presence of these features can be determined by
> > > <<
> > > 
> > At the end of this paragraph then mention using CPUID to determine
> > the presence of the counters. AFAIK, there is no feature bit
> > covering performance monitoring. Does that mean we are left
> > with having to check the family and model number just like on
> > Intel?
> 
> Yes I puzzled over that too. Maybe they meant the MSR CPUID bits, but most likely
> it was a mistake by the tech writer.
> 
> Yes I think you have to. Only checking vendor/family should be fine though -- i am not
> aware of performance counter variations between models.

Today, I am just checking for family 15. If they have variations it could be with
the low power (laptop) models where counters may not be present at all.

> Perhaps add a force argument again that disables the family check too.
> 
> > Ok, I think I understand now:
> > 	1/ Bios and Kernel Developer Guide from Ahtlon64 and Opteron 64 is
> > 	  what you are talking about with K7/K8
> 
> Well K8.
> 
> K7 has a different one. But ok. I think you don't try to support K7 at all
> currently (it has the same register format as K8, but the list of counters
> is different)
> 
What is the "commercial name" of K7 processors?

-- 
-Stephane