* Re: [PATCH v2 1/2] nvmem: sunxi-sid: add support for H3 and A64's SID controller
[not found] <20170129015641.54281-1-icenowy@aosc.xyz>
@ 2017-01-30 7:44 ` maxime.ripard
0 siblings, 0 replies; only message in thread
From: maxime.ripard @ 2017-01-30 7:44 UTC (permalink / raw)
To: Icenowy Zheng
Cc: Srinivas Kandagatla, Chen-Yu Tsai, Rob Herring, devicetree,
linux-arm-kernel, linux-kernel, linux-sunxi
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On Sun, Jan 29, 2017 at 09:56:40AM +0800, Icenowy Zheng wrote:
> H3 and A64 SoCs have a bigger SID controller, which has its direct read
> address at 0x200 position in the SID block, not 0x0.
>
> Also, H3 SID controller has some silicon bug that makes the direct read
> value wrong at first, add code to workaround the bug. (This bug has
> already been fixed on A64 and later SoCs)
>
> Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Please split that into several patches. One to allow to set the size
through the structure, one to support the A64, and one to support the
H3.
Thanks,
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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