mirror of https://lore.kernel.org/lkml/
 help / color / mirror / Atom feed
From: Marc Zyngier <marc.zyngier@arm.com>
To: linux-kernel@vger.kernel.org
Cc: Thomas Gleixner <tglx@linutronix.de>,
	Ard Biesheuvel <ard.biesheuvel@linaro.org>,
	Shanker Donthineni <shankerd@codeaurora.org>,
	Shameer Kolothum <shameerali.kolothum.thodi@huawei.com>,
	MaJun <majun258@huawei.com>,
	Laurentiu Tudor <laurentiu.tudor@nxp.com>,
	Lei Zhang <zhang.lei@jp.fujitsu.com>
Subject: [PATCH 0/7] irqchip/gic-v3: LPI allocation refactoring
Date: Wed, 20 Jun 2018 14:52:27 +0100	[thread overview]
Message-ID: <20180620135234.32101-1-marc.zyngier@arm.com> (raw)

The GICv3 LPI allocator has served us well so far, but a number of new
use cases have recently showed up:

- A new extension to the GICv3 architecture allows a hypervisor to
  dramatically restrict the range of available LPIs. This means that
  our current policy of allocating LPIs in blocks of 32 may quickly
  deplete the number of devices that get LPIs

- New and currently undisclosed busses seem to come with thousands of
  devices, each requiring a single LPI. Again, our current allocation
  policy means they quickly run out of LPIs.

Simply expanding the bitmap doesn't seem to be a great idea, so let's
change the LPI allocator altogether. This means we can move individual
busses to a more minimal allocation scheme, though we only do it for
PCI at the moment (Platform MSI looks like the Far West, and I'm
clueless about the FSL MC thing).

This is a pretty invasive change, and I'm thus cc'ing the usual
suspects that have access to weird and wonderful HW to verify
everything still works as expected, and let me know if we can relax
the allocation for their own pet bus implementation.

Only lightly tested in a KVM guest (PCI).


Marc Zyngier (7):
  irqchip/gic-v3-its: Refactor LPI allocator
  irqchip/gic-v3-its: Use full range of LPIs
  irqchip/gic-v3-its: Move minimum LPI requirements to individual busses
  irqchip/gic-v3-its: Drop chunk allocation compatibility
  irqchip/gic-v3: Expose GICD_TYPER in the rdist structure
  irqchip/gic-v3-its: Honor hypervisor enforced LPI range
  irqchip/gic-v3-its: Reduce minimum LPI allocation to 1 for PCI devices

 drivers/irqchip/irq-gic-v3-its-fsl-mc-msi.c   |   3 +
 drivers/irqchip/irq-gic-v3-its-pci-msi.c      |  16 +-
 drivers/irqchip/irq-gic-v3-its-platform-msi.c |   2 +
 drivers/irqchip/irq-gic-v3-its.c              | 225 ++++++++++++------
 drivers/irqchip/irq-gic-v3.c                  |   4 +-
 include/linux/irqchip/arm-gic-v3.h            |   3 +-
 6 files changed, 169 insertions(+), 84 deletions(-)

-- 
2.17.1


             reply	other threads:[~2018-06-20 13:53 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-06-20 13:52 Marc Zyngier [this message]
2018-06-20 13:52 ` [PATCH 1/7] irqchip/gic-v3-its: Refactor LPI allocator Marc Zyngier
2018-06-20 13:52 ` [PATCH 2/7] irqchip/gic-v3-its: Use full range of LPIs Marc Zyngier
2018-06-20 13:52 ` [PATCH 3/7] irqchip/gic-v3-its: Move minimum LPI requirements to individual busses Marc Zyngier
2018-06-20 13:52 ` [PATCH 4/7] irqchip/gic-v3-its: Drop chunk allocation compatibility Marc Zyngier
2018-06-20 13:52 ` [PATCH 5/7] irqchip/gic-v3: Expose GICD_TYPER in the rdist structure Marc Zyngier
2018-06-20 13:52 ` [PATCH 6/7] irqchip/gic-v3-its: Honor hypervisor enforced LPI range Marc Zyngier
2018-06-22 16:31   ` Shameerali Kolothum Thodi
2018-06-22 17:54     ` Marc Zyngier
2018-06-20 13:52 ` [PATCH 7/7] irqchip/gic-v3-its: Reduce minimum LPI allocation to 1 for PCI devices Marc Zyngier
2018-07-18  1:15 ` [PATCH 0/7] irqchip/gic-v3: LPI allocation refactoring Zhang, Lei

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20180620135234.32101-1-marc.zyngier@arm.com \
    --to=marc.zyngier@arm.com \
    --cc=ard.biesheuvel@linaro.org \
    --cc=laurentiu.tudor@nxp.com \
    --cc=linux-kernel@vger.kernel.org \
    --cc=majun258@huawei.com \
    --cc=shameerali.kolothum.thodi@huawei.com \
    --cc=shankerd@codeaurora.org \
    --cc=tglx@linutronix.de \
    --cc=zhang.lei@jp.fujitsu.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox

all inboxes | Powered by JetHome®