From: Marc Zyngier <marc.zyngier@arm.com>
To: linux-kernel@vger.kernel.org
Cc: Thomas Gleixner <tglx@linutronix.de>,
Ard Biesheuvel <ard.biesheuvel@linaro.org>,
Shanker Donthineni <shankerd@codeaurora.org>,
Shameer Kolothum <shameerali.kolothum.thodi@huawei.com>,
MaJun <majun258@huawei.com>,
Laurentiu Tudor <laurentiu.tudor@nxp.com>,
Lei Zhang <zhang.lei@jp.fujitsu.com>
Subject: [PATCH 5/7] irqchip/gic-v3: Expose GICD_TYPER in the rdist structure
Date: Wed, 20 Jun 2018 14:52:32 +0100 [thread overview]
Message-ID: <20180620135234.32101-6-marc.zyngier@arm.com> (raw)
In-Reply-To: <20180620135234.32101-1-marc.zyngier@arm.com>
Instead of exposing the GIC distributor IntID field in the rdist
structure that is passed to the ITS, let's replace it with a
copy of the whole GICD_TYPER register. We are going to need
some of this information at a later time.
No functionnal change.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
---
drivers/irqchip/irq-gic-v3-its.c | 2 +-
drivers/irqchip/irq-gic-v3.c | 4 ++--
include/linux/irqchip/arm-gic-v3.h | 2 +-
3 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c
index 554c9d040c5a..8c7e8c235faf 100644
--- a/drivers/irqchip/irq-gic-v3-its.c
+++ b/drivers/irqchip/irq-gic-v3-its.c
@@ -1600,7 +1600,7 @@ static int __init its_alloc_lpi_tables(void)
{
phys_addr_t paddr;
- lpi_id_bits = gic_rdists->id_bits;
+ lpi_id_bits = GICD_TYPER_ID_BITS(gic_rdists->gicd_typer);
gic_rdists->prop_page = its_allocate_prop_table(GFP_NOWAIT);
if (!gic_rdists->prop_page) {
pr_err("Failed to allocate PROPBASE\n");
diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c
index 76ea56d779a1..e214181b77b7 100644
--- a/drivers/irqchip/irq-gic-v3.c
+++ b/drivers/irqchip/irq-gic-v3.c
@@ -877,7 +877,7 @@ static struct irq_chip gic_eoimode1_chip = {
.flags = IRQCHIP_SET_TYPE_MASKED,
};
-#define GIC_ID_NR (1U << gic_data.rdists.id_bits)
+#define GIC_ID_NR (1U << GICD_TYPER_ID_BITS(gic_data.rdists.gicd_typer))
static int gic_irq_domain_map(struct irq_domain *d, unsigned int irq,
irq_hw_number_t hw)
@@ -1091,7 +1091,7 @@ static int __init gic_init_bases(void __iomem *dist_base,
* The GIC only supports up to 1020 interrupt sources (SGI+PPI+SPI)
*/
typer = readl_relaxed(gic_data.dist_base + GICD_TYPER);
- gic_data.rdists.id_bits = GICD_TYPER_ID_BITS(typer);
+ gic_data.rdists.gicd_typer = typer;
gic_irqs = GICD_TYPER_IRQS(typer);
if (gic_irqs > 1020)
gic_irqs = 1020;
diff --git a/include/linux/irqchip/arm-gic-v3.h b/include/linux/irqchip/arm-gic-v3.h
index cbb872c1b607..396cd99af02f 100644
--- a/include/linux/irqchip/arm-gic-v3.h
+++ b/include/linux/irqchip/arm-gic-v3.h
@@ -576,8 +576,8 @@ struct rdists {
phys_addr_t phys_base;
} __percpu *rdist;
struct page *prop_page;
- int id_bits;
u64 flags;
+ u32 gicd_typer;
bool has_vlpis;
bool has_direct_lpi;
};
--
2.17.1
next prev parent reply other threads:[~2018-06-20 13:53 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-06-20 13:52 [PATCH 0/7] irqchip/gic-v3: LPI allocation refactoring Marc Zyngier
2018-06-20 13:52 ` [PATCH 1/7] irqchip/gic-v3-its: Refactor LPI allocator Marc Zyngier
2018-06-20 13:52 ` [PATCH 2/7] irqchip/gic-v3-its: Use full range of LPIs Marc Zyngier
2018-06-20 13:52 ` [PATCH 3/7] irqchip/gic-v3-its: Move minimum LPI requirements to individual busses Marc Zyngier
2018-06-20 13:52 ` [PATCH 4/7] irqchip/gic-v3-its: Drop chunk allocation compatibility Marc Zyngier
2018-06-20 13:52 ` Marc Zyngier [this message]
2018-06-20 13:52 ` [PATCH 6/7] irqchip/gic-v3-its: Honor hypervisor enforced LPI range Marc Zyngier
2018-06-22 16:31 ` Shameerali Kolothum Thodi
2018-06-22 17:54 ` Marc Zyngier
2018-06-20 13:52 ` [PATCH 7/7] irqchip/gic-v3-its: Reduce minimum LPI allocation to 1 for PCI devices Marc Zyngier
2018-07-18 1:15 ` [PATCH 0/7] irqchip/gic-v3: LPI allocation refactoring Zhang, Lei
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