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From: Marc Zyngier <marc.zyngier@arm.com>
To: linux-kernel@vger.kernel.org
Cc: Thomas Gleixner <tglx@linutronix.de>,
	Ard Biesheuvel <ard.biesheuvel@linaro.org>,
	Shanker Donthineni <shankerd@codeaurora.org>,
	Shameer Kolothum <shameerali.kolothum.thodi@huawei.com>,
	MaJun <majun258@huawei.com>,
	Laurentiu Tudor <laurentiu.tudor@nxp.com>,
	Lei Zhang <zhang.lei@jp.fujitsu.com>
Subject: [PATCH 2/7] irqchip/gic-v3-its: Use full range of LPIs
Date: Wed, 20 Jun 2018 14:52:29 +0100	[thread overview]
Message-ID: <20180620135234.32101-3-marc.zyngier@arm.com> (raw)
In-Reply-To: <20180620135234.32101-1-marc.zyngier@arm.com>

As we used to represent the LPI range using a bitmap, we were reducing
the number of LPIs to at most 64k in order to preserve memory.

With our new allocator, there is no such need, as dealing with 2^16
or 2^32 LPIs takes the same amount of memory.

So let's use the number of IntID bits reported by the GIC instead of
an arbitrary limit.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
---
 drivers/irqchip/irq-gic-v3-its.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c
index 6d148c2108b9..c98e49f8c341 100644
--- a/drivers/irqchip/irq-gic-v3-its.c
+++ b/drivers/irqchip/irq-gic-v3-its.c
@@ -1429,7 +1429,6 @@ static struct irq_chip its_irq_chip = {
  */
 #define IRQS_PER_CHUNK_SHIFT	5
 #define IRQS_PER_CHUNK		(1UL << IRQS_PER_CHUNK_SHIFT)
-#define ITS_MAX_LPI_NRBITS	16 /* 64K LPIs */
 
 static DEFINE_MUTEX(lpi_range_lock);
 static LIST_HEAD(lpi_range_list);
@@ -1610,7 +1609,7 @@ static int __init its_alloc_lpi_tables(void)
 {
 	phys_addr_t paddr;
 
-	lpi_id_bits = min_t(u32, gic_rdists->id_bits, ITS_MAX_LPI_NRBITS);
+	lpi_id_bits = gic_rdists->id_bits;
 	gic_rdists->prop_page = its_allocate_prop_table(GFP_NOWAIT);
 	if (!gic_rdists->prop_page) {
 		pr_err("Failed to allocate PROPBASE\n");
-- 
2.17.1


  parent reply	other threads:[~2018-06-20 13:53 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-06-20 13:52 [PATCH 0/7] irqchip/gic-v3: LPI allocation refactoring Marc Zyngier
2018-06-20 13:52 ` [PATCH 1/7] irqchip/gic-v3-its: Refactor LPI allocator Marc Zyngier
2018-06-20 13:52 ` Marc Zyngier [this message]
2018-06-20 13:52 ` [PATCH 3/7] irqchip/gic-v3-its: Move minimum LPI requirements to individual busses Marc Zyngier
2018-06-20 13:52 ` [PATCH 4/7] irqchip/gic-v3-its: Drop chunk allocation compatibility Marc Zyngier
2018-06-20 13:52 ` [PATCH 5/7] irqchip/gic-v3: Expose GICD_TYPER in the rdist structure Marc Zyngier
2018-06-20 13:52 ` [PATCH 6/7] irqchip/gic-v3-its: Honor hypervisor enforced LPI range Marc Zyngier
2018-06-22 16:31   ` Shameerali Kolothum Thodi
2018-06-22 17:54     ` Marc Zyngier
2018-06-20 13:52 ` [PATCH 7/7] irqchip/gic-v3-its: Reduce minimum LPI allocation to 1 for PCI devices Marc Zyngier
2018-07-18  1:15 ` [PATCH 0/7] irqchip/gic-v3: LPI allocation refactoring Zhang, Lei

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