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From: Serge Semin <Sergey.Semin@baikalelectronics.ru>
To: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Cc: Serge Semin <Sergey.Semin@baikalelectronics.ru>,
	Serge Semin <fancer.lancer@gmail.com>,
	Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>,
	Paul Burton <paulburton@kernel.org>,
	Ralf Baechle <ralf@linux-mips.org>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Arnd Bergmann <arnd@arndb.de>, Rob Herring <robh+dt@kernel.org>,
	<devicetree@vger.kernel.org>,
	afzal mohammed <afzal.mohd.ma@gmail.com>,
	<linux-mips@vger.kernel.org>, <linux-kernel@vger.kernel.org>
Subject: [PATCH v3 14/14] mips: cevt-r4k: Update the r4k-clockevent frequency in sync with CPU
Date: Thu, 21 May 2020 03:34:43 +0300	[thread overview]
Message-ID: <20200521003443.11385-15-Sergey.Semin@baikalelectronics.ru> (raw)
In-Reply-To: <20200521003443.11385-1-Sergey.Semin@baikalelectronics.ru>

Due to being embedded into the CPU cores MIPS count/compare timer
frequency is changed together with the CPU clocks alteration.
In case if frequency really changes the kernel clockevent framework
must be notified, otherwise the kernel timers won't work correctly.
Fix this by calling clockevents_update_freq() for each r4k clockevent
handlers registered per available CPUs.

Traditionally MIPS r4k-clock are clocked with CPU frequency divided by 2.
But this isn't true for some of the platforms. Due to this we have to save
the basic CPU frequency, so then use it to scale the initial timer
frequency (mips_hpt_frequency) and pass the updated value further to the
clockevent framework.

Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Cc: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>
Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Cc: Paul Burton <paulburton@kernel.org>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: devicetree@vger.kernel.org

---

Changelog v3:
- Add r4k_ prefix to the cpufreq change notifier methods.
---
 arch/mips/kernel/cevt-r4k.c | 44 +++++++++++++++++++++++++++++++++++++
 1 file changed, 44 insertions(+)

diff --git a/arch/mips/kernel/cevt-r4k.c b/arch/mips/kernel/cevt-r4k.c
index 17a9cbb8b3df..995ad9e69ded 100644
--- a/arch/mips/kernel/cevt-r4k.c
+++ b/arch/mips/kernel/cevt-r4k.c
@@ -8,6 +8,7 @@
  */
 #include <linux/clockchips.h>
 #include <linux/interrupt.h>
+#include <linux/cpufreq.h>
 #include <linux/percpu.h>
 #include <linux/smp.h>
 #include <linux/irq.h>
@@ -250,6 +251,49 @@ unsigned int __weak get_c0_compare_int(void)
 	return MIPS_CPU_IRQ_BASE + cp0_compare_irq;
 }
 
+#ifdef CONFIG_CPU_FREQ
+
+static unsigned long mips_ref_freq;
+
+static int r4k_cpufreq_callback(struct notifier_block *nb,
+				unsigned long val, void *data)
+{
+	struct cpufreq_freqs *freq = data;
+	struct clock_event_device *cd;
+	unsigned long rate;
+	int cpu;
+
+	if (!mips_ref_freq)
+		mips_ref_freq = freq->old;
+
+	if (val == CPUFREQ_POSTCHANGE) {
+		rate = cpufreq_scale(mips_hpt_frequency, mips_ref_freq,
+				     freq->new);
+
+		for_each_cpu(cpu, freq->policy->cpus) {
+			cd = &per_cpu(mips_clockevent_device, cpu);
+
+			clockevents_update_freq(cd, rate);
+		}
+	}
+
+	return 0;
+}
+
+static struct notifier_block r4k_cpufreq_notifier = {
+	.notifier_call  = r4k_cpufreq_callback,
+};
+
+static int __init r4k_register_cpufreq_notifier(void)
+{
+	return cpufreq_register_notifier(&r4k_cpufreq_notifier,
+					 CPUFREQ_TRANSITION_NOTIFIER);
+
+}
+core_initcall(r4k_register_cpufreq_notifier);
+
+#endif /* !CONFIG_CPU_FREQ */
+
 int r4k_clockevent_init(void)
 {
 	unsigned long flags = IRQF_PERCPU | IRQF_TIMER | IRQF_SHARED;
-- 
2.25.1


  parent reply	other threads:[~2020-05-21  0:35 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-05-21  0:34 [PATCH v3 00/14] mips: Prepare MIPS-arch code for Baikal-T1 SoC support Serge Semin
2020-05-21  0:34 ` [PATCH v3 01/14] dt-bindings: power: Convert mti,mips-cpc to DT schema Serge Semin
2020-05-21  0:34 ` [PATCH v3 02/14] dt-bindings: bus: Add MIPS CDMM controller Serge Semin
2020-05-21  0:34 ` [PATCH v3 03/14] mips: Add MIPS Release 5 support Serge Semin
2020-05-21  0:34 ` [PATCH v3 04/14] mips: Add MIPS Warrior P5600 support Serge Semin
2020-05-21  0:34 ` [PATCH v3 05/14] mips: Fix cpu_has_mips64r1/2 activation for MIPS32 CPUs Serge Semin
2020-05-21  0:34 ` [PATCH v3 06/14] mips: Add CP0 Write Merge config support Serge Semin
2020-05-21  0:34 ` [PATCH v3 07/14] mips: Add CONFIG/CONFIG6/Cause reg fields macro Serge Semin
2020-05-21  0:34 ` [PATCH v3 08/14] mips: MAAR: Use more precise address mask Serge Semin
2020-05-21  7:11   ` Thomas Bogendoerfer
2020-05-21  0:34 ` [PATCH v3 09/14] mips: Add CPS_NS16550_WIDTH config Serge Semin
2020-05-21  0:34 ` [PATCH v3 10/14] mips: cdmm: Add mti,mips-cdmm dtb node support Serge Semin
2020-05-21  0:34 ` [PATCH v3 11/14] bus: cdmm: Add MIPS R5 arch support Serge Semin
2020-05-21 10:25   ` Sergei Shtylyov
2020-05-21 12:58     ` Serge Semin
2020-05-21 15:44       ` Sergei Shtylyov
2020-05-21  0:34 ` [PATCH v3 12/14] mips: Add udelay lpj numbers adjustment Serge Semin
2020-05-21  0:34 ` [PATCH v3 13/14] mips: csrc-r4k: Mark R4K timer as unstable if CPU freq changes Serge Semin
2020-05-21  0:34 ` Serge Semin [this message]
2020-05-21  0:42 ` [PATCH v3 00/14] mips: Prepare MIPS-arch code for Baikal-T1 SoC support Serge Semin
2020-05-21  7:14   ` Thomas Bogendoerfer
2020-05-21  7:30     ` Arnd Bergmann
2020-05-21 13:48       ` Serge Semin
2020-05-21 13:50     ` Serge Semin

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