From: Apurva Nandan <a-nandan@ti.com>
To: Miquel Raynal <miquel.raynal@bootlin.com>,
Richard Weinberger <richard@nod.at>,
Vignesh Raghavendra <vigneshr@ti.com>,
Mark Brown <broonie@kernel.org>, Apurva Nandan <a-nandan@ti.com>,
Patrice Chotard <patrice.chotard@foss.st.com>,
Christophe Kerello <christophe.kerello@foss.st.com>,
Boris Brezillon <boris.brezillon@collabora.com>,
Daniel Palmer <daniel@0x0f.com>,
Alexander Lobakin <alobakin@pm.me>,
<linux-mtd@lists.infradead.org>, <linux-kernel@vger.kernel.org>,
<linux-spi@vger.kernel.org>
Cc: <p.yadav@ti.com>
Subject: [PATCH v3 13/17] mtd: spinand: winbond: Add support for write volatile configuration register op
Date: Sat, 1 Jan 2022 13:12:46 +0530 [thread overview]
Message-ID: <20220101074250.14443-14-a-nandan@ti.com> (raw)
In-Reply-To: <20220101074250.14443-1-a-nandan@ti.com>
Volatile configuration register are a different set of configuration
registers, i.e. they differ from the status registers. A different
SPI instruction is required to write to these registers. Any changes
to the Volatile Configuration Register get transferred directly to
the Internal Configuration Register and instantly reflect on the
device operation.
In Winbond W35N01JW, these volatile configuration register must be
configured in order to switch to Octal DTR SPI mode.
Add support for writing to volatile configuration registers using a
new WRITE_VCR_OP template.
Datasheet: https://www.winbond.com/export/sites/winbond/datasheet/W35N01JW_Datasheet_Brief.pdf
Signed-off-by: Apurva Nandan <a-nandan@ti.com>
---
drivers/mtd/nand/spi/core.c | 2 +-
drivers/mtd/nand/spi/winbond.c | 43 ++++++++++++++++++++++++++++++++++
include/linux/mtd/spinand.h | 1 +
3 files changed, 45 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c
index 9d1c72634e5a..21d3b4ebdeaa 100644
--- a/drivers/mtd/nand/spi/core.c
+++ b/drivers/mtd/nand/spi/core.c
@@ -343,7 +343,7 @@ static void spinand_ondie_ecc_save_status(struct nand_device *nand, u8 status)
engine_conf->status = status;
}
-static int spinand_write_enable_op(struct spinand_device *spinand)
+int spinand_write_enable_op(struct spinand_device *spinand)
{
struct spi_mem_op op = spinand->ctrl_ops->ops.write_enable;
diff --git a/drivers/mtd/nand/spi/winbond.c b/drivers/mtd/nand/spi/winbond.c
index 76684428354e..3e0829f58350 100644
--- a/drivers/mtd/nand/spi/winbond.c
+++ b/drivers/mtd/nand/spi/winbond.c
@@ -7,6 +7,7 @@
* Boris Brezillon <boris.brezillon@bootlin.com>
*/
+#include <linux/delay.h>
#include <linux/device.h>
#include <linux/kernel.h>
#include <linux/mtd/spinand.h>
@@ -114,6 +115,48 @@ static int winbond_spinand_init(struct spinand_device *spinand)
return 0;
}
+/**
+ * winbond_write_vcr_op() - write values onto the volatile configuration
+ * registers (VCR)
+ * @spinand: the spinand device
+ * @reg: the address of the particular reg in the VCR to be written on
+ * @val: the value to be written on the reg in the VCR
+ *
+ * Volatile configuration registers are a separate set of configuration
+ * registers, i.e. they differ from the status registers SR-1/2/3. A different
+ * SPI instruction is required to write to these registers. Any changes
+ * to the Volatile Configuration Register get transferred directly to
+ * the Internal Configuration Register and instantly reflect on the
+ * device operation.
+ */
+static int winbond_write_vcr_op(struct spinand_device *spinand, u8 reg, u8 val)
+{
+ int ret;
+ struct spi_mem_op op =
+ SPI_MEM_OP(SPI_MEM_OP_CMD(0x81, 1),
+ SPI_MEM_OP_ADDR(3, reg, 1),
+ SPI_MEM_OP_NO_DUMMY,
+ SPI_MEM_OP_DATA_OUT(1, spinand->scratchbuf, 1));
+
+ *spinand->scratchbuf = val;
+
+ ret = spinand_write_enable_op(spinand);
+ if (ret)
+ return ret;
+
+ ret = spi_mem_exec_op(spinand->spimem, &op);
+ if (ret)
+ return ret;
+
+ /*
+ * Write VCR operation doesn't set the busy bit in SR, so can't perform
+ * a status poll. Minimum time of 50ns is needed to complete the write.
+ * So, give thrice the minimum required delay.
+ */
+ ndelay(150);
+ return 0;
+}
+
static const struct spinand_manufacturer_ops winbond_spinand_manuf_ops = {
.init = winbond_spinand_init,
};
diff --git a/include/linux/mtd/spinand.h b/include/linux/mtd/spinand.h
index f12aa4516fab..4c1925ee327a 100644
--- a/include/linux/mtd/spinand.h
+++ b/include/linux/mtd/spinand.h
@@ -638,5 +638,6 @@ int spinand_match_and_init(struct spinand_device *spinand,
int spinand_upd_cfg(struct spinand_device *spinand, u8 mask, u8 val);
int spinand_select_target(struct spinand_device *spinand, unsigned int target);
+int spinand_write_enable_op(struct spinand_device *spinand);
#endif /* __LINUX_MTD_SPINAND_H */
--
2.25.1
next prev parent reply other threads:[~2022-01-01 7:44 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-01-01 7:42 [PATCH v3 00/17] mtd: spinand: Add Octal DTR SPI (8D-8D-8D) mode support Apurva Nandan
2022-01-01 7:42 ` [PATCH v3 01/17] spi: spi-mem: Add DTR templates for cmd, address, dummy and data phase Apurva Nandan
2022-01-04 14:52 ` Mark Brown
2022-01-04 15:31 ` Boris Brezillon
2022-01-05 5:50 ` Pratyush Yadav
2022-01-05 7:36 ` Boris Brezillon
2022-01-05 8:24 ` Tudor.Ambarus
2022-01-01 7:42 ` [PATCH v3 02/17] mtd: spinand: Define macros for Octal DTR ops Apurva Nandan
2022-01-01 7:42 ` [PATCH v3 03/17] mtd: spinand: Add enum spinand_protocol to indicate current SPI IO mode Apurva Nandan
2022-01-03 10:05 ` Boris Brezillon
2022-01-01 7:42 ` [PATCH v3 04/17] mtd: spinand: Rename 'op_templates' to 'data_ops' Apurva Nandan
2022-01-03 9:48 ` Boris Brezillon
2022-01-01 7:42 ` [PATCH v3 05/17] mtd: spinand: Define ctrl_ops for non-page read/write op templates Apurva Nandan
2022-01-03 10:01 ` Boris Brezillon
2022-01-03 10:36 ` Boris Brezillon
2022-02-15 15:33 ` Apurva Nandan
2022-02-15 17:37 ` Boris Brezillon
2022-03-02 15:30 ` Apurva Nandan
2022-03-02 20:05 ` Boris Brezillon
2022-03-10 7:57 ` Apurva Nandan
2022-03-10 8:40 ` Boris Brezillon
2022-03-14 11:47 ` Apurva Nandan
2022-01-01 7:42 ` [PATCH v3 06/17] mtd: spinand: Define default ctrl_ops in the core Apurva Nandan
2022-01-01 7:42 ` [PATCH v3 07/17] mtd: spinand: Switch from op macros usage to 'ctrl_ops' " Apurva Nandan
2022-01-01 7:42 ` [PATCH v3 08/17] mtd: spinand: Add support for manufacturer-based ctrl_ops variations Apurva Nandan
2022-01-01 7:42 ` [PATCH v3 09/17] mtd: spinand: Add change_mode() in manufacturer_ops Apurva Nandan
2022-01-05 9:52 ` Boris Brezillon
2022-01-01 7:42 ` [PATCH v3 10/17] mtd: spinand: Add pointer to probed flash's spinand_info Apurva Nandan
2022-01-01 7:42 ` [PATCH v3 11/17] mtd: spinand: Allow enabling/disabling Octal DTR mode in the core Apurva Nandan
2022-01-03 10:14 ` Boris Brezillon
2022-01-01 7:42 ` [PATCH v3 12/17] mtd: spinand: Add mtd_suspend() to disable Octal DTR mode at suspend Apurva Nandan
2022-01-03 10:17 ` Boris Brezillon
2022-01-01 7:42 ` Apurva Nandan [this message]
2022-01-01 7:42 ` [PATCH v3 14/17] mtd: spinand: winbond: Add octal_dtr_enable/disable() in manufacturer_ops Apurva Nandan
2022-01-01 7:42 ` [PATCH v3 15/17] mtd: spianand: winbond: Add change_mode() manufacturer_ops Apurva Nandan
2022-01-03 10:27 ` Boris Brezillon
2022-01-01 7:42 ` [PATCH v3 16/17] mtd: spinand: winbond: Rename cache op_variants struct variable Apurva Nandan
2022-01-01 7:42 ` [PATCH v3 17/17] mtd: spinand: winbond: Add support for Winbond W35N01JW SPI NAND flash Apurva Nandan
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