From: Tianfei Zhang <tianfei.zhang@intel.com>
To: hao.wu@intel.com, trix@redhat.com, mdf@kernel.org,
yilun.xu@intel.com, linux-fpga@vger.kernel.org,
linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org,
rdunlap@infradead.org
Cc: corbet@lwn.net, Tianfei zhang <tianfei.zhang@intel.com>,
Matthew Gerlach <matthew.gerlach@linux.intel.com>
Subject: [PATCH v6 2/6] fpga: dfl: tracking port conntected with AFU
Date: Wed, 16 Mar 2022 03:08:10 -0400 [thread overview]
Message-ID: <20220316070814.1916017-3-tianfei.zhang@intel.com> (raw)
In-Reply-To: <20220316070814.1916017-1-tianfei.zhang@intel.com>
From: Tianfei zhang <tianfei.zhang@intel.com>
Introducing flags in dfl_fpga_cdev to track extensions
or new features discovered during DFL enumeration. It uses
some lowest bits of flags to track the port status which
the AFU was connected to port device or not. In legacy
model, the AFU was connected to Port device, but in "multiple
VFs per PR slot" model, the AFU or PR slot without connected
to Port device directly.
Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com>
Signed-off-by: Tianfei zhang <tianfei.zhang@intel.com>
---
drivers/fpga/dfl.c | 11 ++++++++++-
drivers/fpga/dfl.h | 12 ++++++++++++
2 files changed, 22 insertions(+), 1 deletion(-)
diff --git a/drivers/fpga/dfl.c b/drivers/fpga/dfl.c
index 599bb21d86af..712c53363fda 100644
--- a/drivers/fpga/dfl.c
+++ b/drivers/fpga/dfl.c
@@ -1124,8 +1124,10 @@ static void build_info_complete(struct build_feature_devs_info *binfo)
static int parse_feature_fiu(struct build_feature_devs_info *binfo,
resource_size_t ofst)
{
+ struct dfl_fpga_cdev *cdev = binfo->cdev;
int ret = 0;
u32 offset;
+ u32 port;
u16 id;
u64 v;
@@ -1160,8 +1162,15 @@ static int parse_feature_fiu(struct build_feature_devs_info *binfo,
v = readq(binfo->ioaddr + NEXT_AFU);
offset = FIELD_GET(NEXT_AFU_NEXT_DFH_OFST, v);
- if (offset)
+ if (offset) {
+ if (dfh_id_to_type(id) == PORT_ID) {
+ port = FIELD_GET(PORT_CAP_PORT_NUM,
+ readq(binfo->ioaddr + PORT_HDR_CAP));
+ cdev->flags |= dfl_feat_port_connect_afu(port);
+ }
+
return parse_feature_afu(binfo, offset);
+ }
dev_dbg(binfo->dev, "No AFUs detected on FIU %d\n", id);
diff --git a/drivers/fpga/dfl.h b/drivers/fpga/dfl.h
index 1fd493e82dd8..bc56b7e8c01b 100644
--- a/drivers/fpga/dfl.h
+++ b/drivers/fpga/dfl.h
@@ -461,6 +461,16 @@ int dfl_fpga_enum_info_add_irq(struct dfl_fpga_enum_info *info,
unsigned int nr_irqs, int *irq_table);
void dfl_fpga_enum_info_free(struct dfl_fpga_enum_info *info);
+/*
+ * Bitfields in flags of dfl_fpga_cdev.
+ *
+ * 0 - (DFL_PORT_CONNECT_BITS -1): AFU was connected with Port device.
+ * DFL_PORT_CONNECT_BITS - 63: reserved.
+ */
+#define dfl_feat_port_connect_afu(port) (BIT_ULL(port))
+#define DFL_PORT_CONNECT_BITS MAX_DFL_FPGA_PORT_NUM
+#define DFL_FEAT_PORT_CONNECT_MASK ((1UL << (DFL_PORT_CONNECT_BITS)) - 1)
+
/**
* struct dfl_fpga_cdev - container device of DFL based FPGA
*
@@ -470,6 +480,7 @@ void dfl_fpga_enum_info_free(struct dfl_fpga_enum_info *info);
* @lock: mutex lock to protect the port device list.
* @port_dev_list: list of all port feature devices under this container device.
* @released_port_num: released port number under this container device.
+ * @flags: extensions discovered during DFL enumeration.
*/
struct dfl_fpga_cdev {
struct device *parent;
@@ -478,6 +489,7 @@ struct dfl_fpga_cdev {
struct mutex lock;
struct list_head port_dev_list;
int released_port_num;
+ u64 flags;
};
struct dfl_fpga_cdev *
--
2.26.2
next prev parent reply other threads:[~2022-03-16 7:13 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-16 7:08 [PATCH v6 0/6] Add OFS support for DFL driver Tianfei Zhang
2022-03-16 7:08 ` [PATCH v6 1/6] fpga: dfl: Allow ports without local bar space Tianfei Zhang
2022-03-17 2:04 ` Wu, Hao
2022-03-17 7:34 ` Zhang, Tianfei
2022-03-17 8:17 ` Wu, Hao
2022-03-17 8:32 ` Zhang, Tianfei
2022-03-16 7:08 ` Tianfei Zhang [this message]
2022-03-17 8:25 ` [PATCH v6 2/6] fpga: dfl: tracking port conntected with AFU Wu, Hao
2022-03-17 8:57 ` Zhang, Tianfei
2022-03-16 7:08 ` [PATCH v6 3/6] fpga: dfl: check released_port_num and num_vfs for legacy model Tianfei Zhang
2022-03-17 8:49 ` Wu, Hao
2022-03-17 9:02 ` Zhang, Tianfei
2022-03-16 7:08 ` [PATCH v6 4/6] fpga: dfl: configure port access mode for afu connected with port Tianfei Zhang
2022-03-16 7:08 ` [PATCH v6 5/6] fpga: dfl: support PF/VF starting with DFH Tianfei Zhang
2022-03-16 7:08 ` [PATCH v6 6/6] Documentation: fpga: dfl: add description of OFS Tianfei Zhang
2022-03-17 8:36 ` Wu, Hao
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