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From: Tianfei Zhang <tianfei.zhang@intel.com>
To: hao.wu@intel.com, trix@redhat.com, mdf@kernel.org,
	yilun.xu@intel.com, linux-fpga@vger.kernel.org,
	linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org,
	rdunlap@infradead.org
Cc: corbet@lwn.net, Tianfei zhang <tianfei.zhang@intel.com>,
	Matthew Gerlach <matthew.gerlach@linux.intel.com>
Subject: [PATCH v6 4/6] fpga: dfl: configure port access mode for afu connected with port
Date: Wed, 16 Mar 2022 03:08:12 -0400	[thread overview]
Message-ID: <20220316070814.1916017-5-tianfei.zhang@intel.com> (raw)
In-Reply-To: <20220316070814.1916017-1-tianfei.zhang@intel.com>

From: Tianfei zhang <tianfei.zhang@intel.com>

In legacy model, we should set AfuAccessCtrl (Bit 55) in PORTn_OFFSET
register to switch VF and PF for AFU. But in "multiple VFs per PR slot"
model, the PF/VF mux hardware unit will statically configure the funciton
mapping without set the AfuAccessCtrl by software. This patch check the
port status in dfl_fpga_cdev->flags before configure the port access mode.

Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com>
Signed-off-by: Tianfei zhang <tianfei.zhang@intel.com>
---
 drivers/fpga/dfl.c | 19 +++++++++++++++++--
 1 file changed, 17 insertions(+), 2 deletions(-)

diff --git a/drivers/fpga/dfl.c b/drivers/fpga/dfl.c
index b95b29c5c81d..71e0725b6be0 100644
--- a/drivers/fpga/dfl.c
+++ b/drivers/fpga/dfl.c
@@ -1666,6 +1666,17 @@ static void config_port_access_mode(struct device *fme_dev, int port_id,
 #define config_port_vf_mode(dev, id) config_port_access_mode(dev, id, true)
 #define config_port_pf_mode(dev, id) config_port_access_mode(dev, id, false)
 
+static int dfl_check_port_connect_afu(struct device *dev, u64 flags)
+{
+	void __iomem *base;
+	int port;
+
+	base = dfl_get_feature_ioaddr_by_id(dev, PORT_FEATURE_ID_HEADER);
+	port = FIELD_GET(PORT_CAP_PORT_NUM, readq(base + PORT_HDR_CAP));
+
+	return flags & dfl_feat_port_connect_afu(port);
+}
+
 /**
  * dfl_fpga_cdev_config_ports_pf - configure ports to PF access mode
  *
@@ -1683,7 +1694,9 @@ void dfl_fpga_cdev_config_ports_pf(struct dfl_fpga_cdev *cdev)
 		if (device_is_registered(&pdata->dev->dev))
 			continue;
 
-		config_port_pf_mode(cdev->fme_dev, pdata->id);
+		/* configure port access mode for AFU connected to Port device */
+		if (dfl_check_port_connect_afu(&pdata->dev->dev, cdev->flags))
+			config_port_pf_mode(cdev->fme_dev, pdata->id);
 	}
 	mutex_unlock(&cdev->lock);
 }
@@ -1722,7 +1735,9 @@ int dfl_fpga_cdev_config_ports_vf(struct dfl_fpga_cdev *cdev, int num_vfs)
 		if (device_is_registered(&pdata->dev->dev))
 			continue;
 
-		config_port_vf_mode(cdev->fme_dev, pdata->id);
+		/* configure port access mode for AFU connected to Port device */
+		if (dfl_check_port_connect_afu(&pdata->dev->dev, cdev->flags))
+			config_port_vf_mode(cdev->fme_dev, pdata->id);
 	}
 done:
 	mutex_unlock(&cdev->lock);
-- 
2.26.2


  parent reply	other threads:[~2022-03-16  7:12 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-03-16  7:08 [PATCH v6 0/6] Add OFS support for DFL driver Tianfei Zhang
2022-03-16  7:08 ` [PATCH v6 1/6] fpga: dfl: Allow ports without local bar space Tianfei Zhang
2022-03-17  2:04   ` Wu, Hao
2022-03-17  7:34     ` Zhang, Tianfei
2022-03-17  8:17       ` Wu, Hao
2022-03-17  8:32         ` Zhang, Tianfei
2022-03-16  7:08 ` [PATCH v6 2/6] fpga: dfl: tracking port conntected with AFU Tianfei Zhang
2022-03-17  8:25   ` Wu, Hao
2022-03-17  8:57     ` Zhang, Tianfei
2022-03-16  7:08 ` [PATCH v6 3/6] fpga: dfl: check released_port_num and num_vfs for legacy model Tianfei Zhang
2022-03-17  8:49   ` Wu, Hao
2022-03-17  9:02     ` Zhang, Tianfei
2022-03-16  7:08 ` Tianfei Zhang [this message]
2022-03-16  7:08 ` [PATCH v6 5/6] fpga: dfl: support PF/VF starting with DFH Tianfei Zhang
2022-03-16  7:08 ` [PATCH v6 6/6] Documentation: fpga: dfl: add description of OFS Tianfei Zhang
2022-03-17  8:36   ` Wu, Hao

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