mirror of https://lore.kernel.org/lkml/
 help / color / mirror / Atom feed
From: Chao Gao <chao.gao@intel.com>
To: kvm@vger.kernel.org
Cc: Jiaan Lu <jiaan.lu@intel.com>, Zhang Chen <chen.zhang@intel.com>,
	Chao Gao <chao.gao@intel.com>,
	Sean Christopherson <seanjc@google.com>,
	Paolo Bonzini <pbonzini@redhat.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
	Dave Hansen <dave.hansen@linux.intel.com>,
	x86@kernel.org, "H. Peter Anvin" <hpa@zytor.com>,
	linux-kernel@vger.kernel.org
Subject: [RFC PATCH v2 03/11] KVM: x86: Advertise BHI_CTRL support
Date: Fri, 14 Apr 2023 14:25:24 +0800	[thread overview]
Message-ID: <20230414062545.270178-4-chao.gao@intel.com> (raw)
In-Reply-To: <20230414062545.270178-1-chao.gao@intel.com>

From: Zhang Chen <chen.zhang@intel.com>

Add 100% kvm-only feature for BHI_CTRL because the kernel doesn't use it
at all.

BHI_CTRL is enumerated by CPUID.7.2.EDX[4]. If supported, BHI_DIS_S (bit
10) of IA32_SPEC_CTRL MSR can be used to enable BHI_DIS_S behavior.

Note that KVM does not intercept guests' IA32_SPEC_CTRL MSR accesses
after a non-zero is written to the MSR. Therefore, guests can already
toggle the BHI_DIS_S bit if the host supports BHI_CTRL, and no extra
code is needed to allow guests to toggle the bit.

Signed-off-by: Zhang Chen <chen.zhang@intel.com>
Signed-off-by: Chao Gao <chao.gao@intel.com>
Tested-by: Jiaan Lu <jiaan.lu@intel.com>
---
 arch/x86/kvm/cpuid.c         | 2 +-
 arch/x86/kvm/reverse_cpuid.h | 1 +
 2 files changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
index f024c3ac2203..7cdd859d09a2 100644
--- a/arch/x86/kvm/cpuid.c
+++ b/arch/x86/kvm/cpuid.c
@@ -686,7 +686,7 @@ void kvm_set_cpu_caps(void)
 	);
 
 	kvm_cpu_cap_init_kvm_defined(CPUID_7_2_EDX,
-		SF(RRSBA_CTRL)
+		SF(RRSBA_CTRL) | F(BHI_CTRL)
 	);
 
 	kvm_cpu_cap_mask(CPUID_8000_0001_ECX,
diff --git a/arch/x86/kvm/reverse_cpuid.h b/arch/x86/kvm/reverse_cpuid.h
index 72bad8314a9c..e7e70c9aa384 100644
--- a/arch/x86/kvm/reverse_cpuid.h
+++ b/arch/x86/kvm/reverse_cpuid.h
@@ -50,6 +50,7 @@ enum kvm_only_cpuid_leafs {
 
 /* Intel-defined sub-features, CPUID level 0x00000007:2 (EDX) */
 #define KVM_X86_FEATURE_RRSBA_CTRL	KVM_X86_FEATURE(CPUID_7_2_EDX, 2)
+#define X86_FEATURE_BHI_CTRL		KVM_X86_FEATURE(CPUID_7_2_EDX, 4)
 
 struct cpuid_reg {
 	u32 function;
-- 
2.40.0


  parent reply	other threads:[~2023-04-14  6:26 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-04-14  6:25 [RFC PATCH v2 00/11] Intel IA32_SPEC_CTRL Virtualization Chao Gao
2023-04-14  6:25 ` [RFC PATCH v2 01/11] x86/msr-index: Add bit definitions for BHI_DIS_S and BHI_NO Chao Gao
2023-04-14  9:52   ` Binbin Wu
2023-04-14  6:25 ` [RFC PATCH v2 02/11] KVM: x86: Advertise CPUID.7.2.EDX and RRSBA_CTRL support Chao Gao
2023-04-16  7:04   ` Binbin Wu
2023-04-16 13:25     ` Chao Gao
2023-05-15  6:53   ` Xiaoyao Li
2023-05-16  2:04     ` Chao Gao
2023-05-16  2:22       ` Xiaoyao Li
2023-05-16  3:01         ` Chao Gao
2023-05-16  7:03           ` Xiaoyao Li
2023-05-16  9:09             ` Chao Gao
2023-05-18  9:50               ` Xiaoyao Li
2023-05-19  9:43                 ` Chao Gao
2023-04-14  6:25 ` Chao Gao [this message]
2023-05-15  7:14   ` [RFC PATCH v2 03/11] KVM: x86: Advertise BHI_CTRL support Xiaoyao Li
2023-04-14  6:25 ` [RFC PATCH v2 04/11] KVM: VMX: Add IA32_SPEC_CTRL virtualization support Chao Gao
2023-04-17  3:17   ` Binbin Wu
2023-04-18  2:07     ` Chao Gao
2023-04-17  6:48   ` Chenyi Qiang
2023-04-17  7:31     ` Chao Gao
2023-05-16  7:16   ` Xiaoyao Li
2023-05-16  9:20     ` Chao Gao
2023-04-14  6:25 ` [RFC PATCH v2 05/11] x86/bugs: Use Virtual MSRs to request hardware mitigations Chao Gao
2023-04-17 13:43   ` Binbin Wu
2023-04-18  2:01     ` Chao Gao
2023-04-14  6:25 ` [RFC PATCH v2 06/11] KVM: x86: Advertise ARCH_CAP_VIRTUAL_ENUM support Chao Gao
2023-05-18 10:14   ` Xiaoyao Li
2023-05-19  9:57     ` Chao Gao
2023-05-22  1:02       ` Xiaoyao Li
2023-04-14  6:25 ` [RFC PATCH v2 07/11] KVM: VMX: Advertise MITIGATION_CTRL support Chao Gao
2023-04-14  6:25 ` [RFC PATCH v2 08/11] KVM: VMX: Advertise MITI_ENUM_RETPOLINE_S_SUPPORT Chao Gao
2023-05-18 10:25   ` Xiaoyao Li
2023-05-19 10:26     ` Chao Gao
2023-05-22  9:43   ` Liu, Jingqi
2023-04-14  6:25 ` [RFC PATCH v2 09/11] KVM: VMX: Advertise MITI_CTRL_BHB_CLEAR_SEQ_S_SUPPORT Chao Gao
2023-05-22  9:41   ` Liu, Jingqi
2023-04-14  6:25 ` [RFC PATCH v2 10/11] KVM: selftests: Add tests for virtual enumeration/mitigation MSRs Chao Gao
2023-05-22  9:39   ` Liu, Jingqi
2023-04-14  6:25 ` [RFC PATCH v2 11/11] KVM: selftests: Add tests for IA32_SPEC_CTRL MSR Chao Gao
2023-04-14  9:51 ` [RFC PATCH v2 00/11] Intel IA32_SPEC_CTRL Virtualization Binbin Wu
2023-04-14 22:10   ` Pawan Gupta

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20230414062545.270178-4-chao.gao@intel.com \
    --to=chao.gao@intel.com \
    --cc=bp@alien8.de \
    --cc=chen.zhang@intel.com \
    --cc=dave.hansen@linux.intel.com \
    --cc=hpa@zytor.com \
    --cc=jiaan.lu@intel.com \
    --cc=kvm@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=mingo@redhat.com \
    --cc=pbonzini@redhat.com \
    --cc=seanjc@google.com \
    --cc=tglx@linutronix.de \
    --cc=x86@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox

all inboxes | Powered by JetHome®