* [PATCH] drm/msm/dpu: increase memtype count to 16 for sm8550
@ 2023-08-02 13:48 Jonathan Marek
2023-08-02 13:55 ` Dmitry Baryshkov
` (3 more replies)
0 siblings, 4 replies; 5+ messages in thread
From: Jonathan Marek @ 2023-08-02 13:48 UTC (permalink / raw)
To: freedreno
Cc: Rob Clark, Abhinav Kumar, Dmitry Baryshkov, Sean Paul,
Marijn Suijten, David Airlie, Daniel Vetter, Konrad Dybcio,
Kuogee Hsieh, Neil Armstrong, Robert Foss, Bjorn Andersson,
open list:DRM DRIVER FOR MSM ADRENO GPU,
open list:DRM DRIVER FOR MSM ADRENO GPU, open list
sm8550 has 16 vbif clients.
This fixes the extra 2 clients (DMA4/DMA5) not having their memtype
initialized. This fixes DMA4/DMA5 planes not displaying correctly.
Fixes: efcd0107 ("drm/msm/dpu: add support for SM8550")
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
---
.../msm/disp/dpu1/catalog/dpu_9_0_sm8550.h | 4 ++--
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 20 +++++++++++++++++++
2 files changed, 22 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h
index f17b9a7fee85..89a2ac1e840d 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h
@@ -245,8 +245,8 @@ const struct dpu_mdss_cfg dpu_sm8550_cfg = {
.merge_3d = sm8550_merge_3d,
.intf_count = ARRAY_SIZE(sm8550_intf),
.intf = sm8550_intf,
- .vbif_count = ARRAY_SIZE(sdm845_vbif),
- .vbif = sdm845_vbif,
+ .vbif_count = ARRAY_SIZE(sm8550_vbif),
+ .vbif = sm8550_vbif,
.perf = &sm8550_perf_data,
.mdss_irqs = BIT(MDP_SSPP_TOP0_INTR) | \
BIT(MDP_SSPP_TOP0_INTR2) | \
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
index 0de507d4d7b7..8b17a4a9b438 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
@@ -663,6 +663,26 @@ static const struct dpu_vbif_cfg sdm845_vbif[] = {
},
};
+static const struct dpu_vbif_cfg sm8550_vbif[] = {
+ {
+ .name = "vbif_rt", .id = VBIF_RT,
+ .base = 0, .len = 0x1040,
+ .features = BIT(DPU_VBIF_QOS_REMAP),
+ .xin_halt_timeout = 0x4000,
+ .qos_rp_remap_size = 0x40,
+ .qos_rt_tbl = {
+ .npriority_lvl = ARRAY_SIZE(sdm845_rt_pri_lvl),
+ .priority_lvl = sdm845_rt_pri_lvl,
+ },
+ .qos_nrt_tbl = {
+ .npriority_lvl = ARRAY_SIZE(sdm845_nrt_pri_lvl),
+ .priority_lvl = sdm845_nrt_pri_lvl,
+ },
+ .memtype_count = 16,
+ .memtype = {3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3},
+ },
+};
+
/*************************************************************
* PERF data config
*************************************************************/
--
2.26.1
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] drm/msm/dpu: increase memtype count to 16 for sm8550
2023-08-02 13:48 [PATCH] drm/msm/dpu: increase memtype count to 16 for sm8550 Jonathan Marek
@ 2023-08-02 13:55 ` Dmitry Baryshkov
2023-08-02 14:11 ` Neil Armstrong
` (2 subsequent siblings)
3 siblings, 0 replies; 5+ messages in thread
From: Dmitry Baryshkov @ 2023-08-02 13:55 UTC (permalink / raw)
To: Jonathan Marek
Cc: freedreno, Rob Clark, Abhinav Kumar, Sean Paul, Marijn Suijten,
David Airlie, Daniel Vetter, Konrad Dybcio, Kuogee Hsieh,
Neil Armstrong, Robert Foss, Bjorn Andersson,
open list:DRM DRIVER FOR MSM ADRENO GPU,
open list:DRM DRIVER FOR MSM ADRENO GPU, open list
On Wed, 2 Aug 2023 at 16:51, Jonathan Marek <jonathan@marek.ca> wrote:
>
> sm8550 has 16 vbif clients.
>
> This fixes the extra 2 clients (DMA4/DMA5) not having their memtype
> initialized. This fixes DMA4/DMA5 planes not displaying correctly.
>
> Fixes: efcd0107 ("drm/msm/dpu: add support for SM8550")
> Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Thanks!
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
> .../msm/disp/dpu1/catalog/dpu_9_0_sm8550.h | 4 ++--
> .../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 20 +++++++++++++++++++
> 2 files changed, 22 insertions(+), 2 deletions(-)
--
With best wishes
Dmitry
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] drm/msm/dpu: increase memtype count to 16 for sm8550
2023-08-02 13:48 [PATCH] drm/msm/dpu: increase memtype count to 16 for sm8550 Jonathan Marek
2023-08-02 13:55 ` Dmitry Baryshkov
@ 2023-08-02 14:11 ` Neil Armstrong
2023-08-02 14:19 ` Dmitry Baryshkov
2023-08-03 11:18 ` Dmitry Baryshkov
3 siblings, 0 replies; 5+ messages in thread
From: Neil Armstrong @ 2023-08-02 14:11 UTC (permalink / raw)
To: Jonathan Marek, freedreno
Cc: Rob Clark, Abhinav Kumar, Dmitry Baryshkov, Sean Paul,
Marijn Suijten, David Airlie, Daniel Vetter, Konrad Dybcio,
Kuogee Hsieh, Robert Foss, Bjorn Andersson,
open list:DRM DRIVER FOR MSM ADRENO GPU,
open list:DRM DRIVER FOR MSM ADRENO GPU, open list
On 02/08/2023 15:48, Jonathan Marek wrote:
> sm8550 has 16 vbif clients.
>
> This fixes the extra 2 clients (DMA4/DMA5) not having their memtype
> initialized. This fixes DMA4/DMA5 planes not displaying correctly.
>
> Fixes: efcd0107 ("drm/msm/dpu: add support for SM8550")
> Signed-off-by: Jonathan Marek <jonathan@marek.ca>
> ---
> .../msm/disp/dpu1/catalog/dpu_9_0_sm8550.h | 4 ++--
> .../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 20 +++++++++++++++++++
> 2 files changed, 22 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h
> index f17b9a7fee85..89a2ac1e840d 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h
> +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h
> @@ -245,8 +245,8 @@ const struct dpu_mdss_cfg dpu_sm8550_cfg = {
> .merge_3d = sm8550_merge_3d,
> .intf_count = ARRAY_SIZE(sm8550_intf),
> .intf = sm8550_intf,
> - .vbif_count = ARRAY_SIZE(sdm845_vbif),
> - .vbif = sdm845_vbif,
> + .vbif_count = ARRAY_SIZE(sm8550_vbif),
> + .vbif = sm8550_vbif,
> .perf = &sm8550_perf_data,
> .mdss_irqs = BIT(MDP_SSPP_TOP0_INTR) | \
> BIT(MDP_SSPP_TOP0_INTR2) | \
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> index 0de507d4d7b7..8b17a4a9b438 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> @@ -663,6 +663,26 @@ static const struct dpu_vbif_cfg sdm845_vbif[] = {
> },
> };
>
> +static const struct dpu_vbif_cfg sm8550_vbif[] = {
> + {
> + .name = "vbif_rt", .id = VBIF_RT,
> + .base = 0, .len = 0x1040,
> + .features = BIT(DPU_VBIF_QOS_REMAP),
> + .xin_halt_timeout = 0x4000,
> + .qos_rp_remap_size = 0x40,
> + .qos_rt_tbl = {
> + .npriority_lvl = ARRAY_SIZE(sdm845_rt_pri_lvl),
> + .priority_lvl = sdm845_rt_pri_lvl,
> + },
> + .qos_nrt_tbl = {
> + .npriority_lvl = ARRAY_SIZE(sdm845_nrt_pri_lvl),
> + .priority_lvl = sdm845_nrt_pri_lvl,
> + },
> + .memtype_count = 16,
> + .memtype = {3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3},
> + },
> +};
> +
> /*************************************************************
> * PERF data config
> *************************************************************/
Thanks !
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8550-QRD
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] drm/msm/dpu: increase memtype count to 16 for sm8550
2023-08-02 13:48 [PATCH] drm/msm/dpu: increase memtype count to 16 for sm8550 Jonathan Marek
2023-08-02 13:55 ` Dmitry Baryshkov
2023-08-02 14:11 ` Neil Armstrong
@ 2023-08-02 14:19 ` Dmitry Baryshkov
2023-08-03 11:18 ` Dmitry Baryshkov
3 siblings, 0 replies; 5+ messages in thread
From: Dmitry Baryshkov @ 2023-08-02 14:19 UTC (permalink / raw)
To: freedreno, Jonathan Marek
Cc: Rob Clark, Abhinav Kumar, Sean Paul, Marijn Suijten,
David Airlie, Daniel Vetter, Konrad Dybcio, Kuogee Hsieh,
Neil Armstrong, Robert Foss, Bjorn Andersson, linux-arm-msm,
dri-devel, linux-kernel
On Wed, 02 Aug 2023 09:48:53 -0400, Jonathan Marek wrote:
> sm8550 has 16 vbif clients.
>
> This fixes the extra 2 clients (DMA4/DMA5) not having their memtype
> initialized. This fixes DMA4/DMA5 planes not displaying correctly.
>
>
Applied, thanks!
[1/1] drm/msm/dpu: increase memtype count to 16 for sm8550
https://gitlab.freedesktop.org/lumag/msm/-/commit/08bfcdc2c358
Best regards,
--
Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] drm/msm/dpu: increase memtype count to 16 for sm8550
2023-08-02 13:48 [PATCH] drm/msm/dpu: increase memtype count to 16 for sm8550 Jonathan Marek
` (2 preceding siblings ...)
2023-08-02 14:19 ` Dmitry Baryshkov
@ 2023-08-03 11:18 ` Dmitry Baryshkov
3 siblings, 0 replies; 5+ messages in thread
From: Dmitry Baryshkov @ 2023-08-03 11:18 UTC (permalink / raw)
To: freedreno, Jonathan Marek
Cc: Rob Clark, Abhinav Kumar, Sean Paul, Marijn Suijten,
David Airlie, Daniel Vetter, Konrad Dybcio, Kuogee Hsieh,
Neil Armstrong, Robert Foss, Bjorn Andersson, linux-arm-msm,
dri-devel, linux-kernel
On Wed, 02 Aug 2023 09:48:53 -0400, Jonathan Marek wrote:
> sm8550 has 16 vbif clients.
>
> This fixes the extra 2 clients (DMA4/DMA5) not having their memtype
> initialized. This fixes DMA4/DMA5 planes not displaying correctly.
>
>
Applied, thanks!
[1/1] drm/msm/dpu: increase memtype count to 16 for sm8550
https://gitlab.freedesktop.org/lumag/msm/-/commit/42d0d253ed03
Best regards,
--
Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2023-08-03 11:18 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-08-02 13:48 [PATCH] drm/msm/dpu: increase memtype count to 16 for sm8550 Jonathan Marek
2023-08-02 13:55 ` Dmitry Baryshkov
2023-08-02 14:11 ` Neil Armstrong
2023-08-02 14:19 ` Dmitry Baryshkov
2023-08-03 11:18 ` Dmitry Baryshkov
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®