From: "Chang S. Bae" <chang.seok.bae@intel.com>
To: mingo@redhat.com
Cc: linux-kernel@vger.kernel.org, x86@kernel.org, tglx@linutronix.de,
bp@alien8.de, dave.hansen@linux.intel.com,
chang.seok.bae@intel.com
Subject: [PATCH 07/10] x86/fpu: Refactor xfeature bitmask update code for sigframe XSAVE
Date: Tue, 15 Apr 2025 19:16:57 -0700 [thread overview]
Message-ID: <20250416021720.12305-8-chang.seok.bae@intel.com> (raw)
In-Reply-To: <20250416021720.12305-1-chang.seok.bae@intel.com>
Currently, saving register states in the signal frame, the legacy feature
bits are always set in xregs_state->header->xfeatures. This code sequence
can be generalized for reuse in similar cases.
Refactor the logic to ensure a consistent approach across similar usages.
Signed-off-by: Chang S. Bae <chang.seok.bae@intel.com>
---
Changes from the last posting:
https://lore.kernel.org/lkml/20250214010607.7067-2-chang.seok.bae@intel.com/
* No change
This patch and the next were previously posted together. I thought this
refactoring is a meaningful step toward decoupling PKRU from an
unnecessary dependency on XGETBV(1).
---
arch/x86/kernel/fpu/signal.c | 11 +----------
arch/x86/kernel/fpu/xstate.h | 12 ++++++++++++
2 files changed, 13 insertions(+), 10 deletions(-)
diff --git a/arch/x86/kernel/fpu/signal.c b/arch/x86/kernel/fpu/signal.c
index b8b4fa9c2d04..c3ec2512f2bb 100644
--- a/arch/x86/kernel/fpu/signal.c
+++ b/arch/x86/kernel/fpu/signal.c
@@ -114,7 +114,6 @@ static inline bool save_xstate_epilog(void __user *buf, int ia32_frame,
{
struct xregs_state __user *x = buf;
struct _fpx_sw_bytes sw_bytes = {};
- u32 xfeatures;
int err;
/* Setup the bytes not touched by the [f]xsave and reserved for SW. */
@@ -127,12 +126,6 @@ static inline bool save_xstate_epilog(void __user *buf, int ia32_frame,
err |= __put_user(FP_XSTATE_MAGIC2,
(__u32 __user *)(buf + fpstate->user_size));
- /*
- * Read the xfeatures which we copied (directly from the cpu or
- * from the state in task struct) to the user buffers.
- */
- err |= __get_user(xfeatures, (__u32 __user *)&x->header.xfeatures);
-
/*
* For legacy compatible, we always set FP/SSE bits in the bit
* vector while saving the state to the user context. This will
@@ -144,9 +137,7 @@ static inline bool save_xstate_epilog(void __user *buf, int ia32_frame,
* header as well as change any contents in the memory layout.
* xrestore as part of sigreturn will capture all the changes.
*/
- xfeatures |= XFEATURE_MASK_FPSSE;
-
- err |= __put_user(xfeatures, (__u32 __user *)&x->header.xfeatures);
+ err |= set_xfeature_in_sigframe(x, XFEATURE_MASK_FPSSE);
return !err;
}
diff --git a/arch/x86/kernel/fpu/xstate.h b/arch/x86/kernel/fpu/xstate.h
index 9a3a8ccf13bf..aadf02aed071 100644
--- a/arch/x86/kernel/fpu/xstate.h
+++ b/arch/x86/kernel/fpu/xstate.h
@@ -69,6 +69,18 @@ static inline u64 xfeatures_mask_independent(void)
return fpu_kernel_cfg.independent_features;
}
+static inline int set_xfeature_in_sigframe(struct xregs_state __user *xbuf, u64 mask)
+{
+ u64 xfeatures;
+ int err;
+
+ /* Read the xfeatures value already saved in the user buffer */
+ err = __get_user(xfeatures, &xbuf->header.xfeatures);
+ xfeatures |= mask;
+ err |= __put_user(xfeatures, &xbuf->header.xfeatures);
+ return err;
+}
+
/*
* Update the value of PKRU register that was already pushed onto the signal frame.
*/
--
2.45.2
next prev parent reply other threads:[~2025-04-16 2:17 UTC|newest]
Thread overview: 112+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-27 18:44 [PATCH RFC v1 00/11] x86: Support Intel Advanced Performance Extensions Chang S. Bae
2025-02-27 18:44 ` [PATCH RFC v1 01/11] x86/fpu/xstate: Simplify print_xstate_features() Chang S. Bae
2025-02-27 18:51 ` Dave Hansen
2025-02-27 18:52 ` Ingo Molnar
2025-02-27 19:04 ` [tip: x86/fpu] " tip-bot2 for Chang S. Bae
2025-02-27 18:44 ` [PATCH RFC v1 02/11] x86/fpu/xstate: Introduce xstate order table and accessor macro Chang S. Bae
2025-02-27 19:03 ` Dave Hansen
2025-02-27 19:34 ` Andrew Cooper
2025-02-27 19:42 ` Ingo Molnar
2025-03-20 23:46 ` Chang S. Bae
2025-02-27 19:05 ` Ingo Molnar
2025-02-27 19:32 ` Dave Hansen
2025-02-27 19:36 ` Ingo Molnar
2025-02-27 19:49 ` Andrew Cooper
2025-02-27 20:06 ` Ingo Molnar
2025-02-27 21:10 ` Andrew Cooper
2025-02-27 21:28 ` Ingo Molnar
2025-02-27 21:30 ` Ingo Molnar
2025-02-27 22:23 ` Andrew Cooper
2025-02-28 3:10 ` Chang S. Bae
2025-02-28 17:11 ` Ingo Molnar
2025-02-27 19:56 ` Dave Hansen
2025-02-27 20:02 ` Ingo Molnar
2025-02-27 20:19 ` Dave Hansen
2025-02-27 20:29 ` Ingo Molnar
2025-02-27 21:17 ` Dave Hansen
2025-02-27 21:37 ` Ingo Molnar
2025-02-27 23:54 ` Dave Hansen
2025-02-28 15:20 ` Sean Christopherson
2025-02-27 18:44 ` [PATCH RFC v1 03/11] x86/fpu/xstate: Remove xstate offset check Chang S. Bae
2025-02-27 18:44 ` [PATCH RFC v1 04/11] x86/fpu/xstate: Adjust XSAVE buffer size calculation Chang S. Bae
2025-02-27 18:44 ` [PATCH RFC v1 05/11] x86/fpu/xstate: Adjust xstate copying logic for user ABI Chang S. Bae
2025-02-27 18:44 ` [PATCH RFC v1 06/11] x86/fpu/mpx: Remove MPX xstate component support Chang S. Bae
2025-02-27 19:12 ` Ingo Molnar
2025-02-28 3:12 ` Chang S. Bae
2025-03-20 23:47 ` Chang S. Bae
2025-04-01 17:13 ` Chang S. Bae
2025-02-27 18:44 ` [PATCH RFC v1 07/11] x86/cpufeatures: Add X86_FEATURE_APX Chang S. Bae
2025-02-27 18:44 ` [PATCH RFC v1 08/11] x86/fpu/apx: Define APX state component Chang S. Bae
2025-02-27 18:44 ` [PATCH RFC v1 09/11] x86/fpu/apx: Disallow conflicting MPX presence Chang S. Bae
2025-02-27 23:16 ` Dave Hansen
2025-02-27 23:58 ` Chang S. Bae
2025-02-27 18:44 ` [PATCH RFC v1 10/11] x86/fpu/apx: Enable APX state support Chang S. Bae
2025-02-27 18:44 ` [PATCH RFC v1 11/11] selftests/x86/apx: Add APX test Chang S. Bae
2025-02-27 19:15 ` [PATCH RFC v1 00/11] x86: Support Intel Advanced Performance Extensions Ingo Molnar
2025-02-27 19:36 ` Dave Hansen
2025-02-28 3:10 ` Chang S. Bae
2025-03-20 23:42 ` [PATCH RFC v2 0/9] " Chang S. Bae
2025-03-20 23:42 ` [PATCH RFC v2 1/9] x86/fpu/xstate: Remove xstate offset check Chang S. Bae
2025-03-25 10:18 ` [tip: x86/fpu] " tip-bot2 for Chang S. Bae
2025-04-14 7:34 ` [tip: x86/merge] " tip-bot2 for Chang S. Bae
2025-03-20 23:42 ` [PATCH RFC v2 2/9] x86/fpu/xstate: Introduce xfeature order table and accessor macro Chang S. Bae
2025-03-25 10:18 ` [tip: x86/fpu] " tip-bot2 for Chang S. Bae
2025-04-14 7:34 ` [tip: x86/merge] " tip-bot2 for Chang S. Bae
2025-03-20 23:42 ` [PATCH RFC v2 3/9] x86/fpu/xstate: Adjust XSAVE buffer size calculation Chang S. Bae
2025-03-25 10:28 ` [tip: x86/fpu] " tip-bot2 for Chang S. Bae
2025-04-14 7:34 ` [tip: x86/merge] " tip-bot2 for Chang S. Bae
2025-03-20 23:42 ` [PATCH RFC v2 4/9] x86/fpu/xstate: Adjust xstate copying logic for user ABI Chang S. Bae
2025-03-25 10:18 ` [tip: x86/fpu] " tip-bot2 for Chang S. Bae
2025-03-25 10:28 ` tip-bot2 for Chang S. Bae
2025-04-14 7:34 ` [tip: x86/merge] " tip-bot2 for Chang S. Bae
2025-03-20 23:42 ` [PATCH RFC v2 5/9] x86/cpufeatures: Add X86_FEATURE_APX Chang S. Bae
2025-04-11 16:12 ` [PATCH RFC v2a " Chang S. Bae
2025-04-11 16:54 ` Sohil Mehta
2025-04-11 18:23 ` Chang S. Bae
2025-04-11 21:57 ` Sohil Mehta
2025-04-12 8:43 ` Ingo Molnar
2025-04-14 8:23 ` Ingo Molnar
2025-04-14 17:28 ` Sohil Mehta
2025-04-14 17:32 ` Dave Hansen
2025-04-14 17:45 ` Sohil Mehta
2025-04-14 18:02 ` Chang S. Bae
2025-04-14 18:12 ` Sohil Mehta
2025-04-14 18:31 ` Chang S. Bae
2025-04-16 2:16 ` [PATCH 00/10] x86/fpu: APX enablement and assorted FPU code improvements Chang S. Bae
2025-04-16 2:16 ` [PATCH 01/10] x86/cpufeatures: Add X86_FEATURE_APX Chang S. Bae
2025-04-16 8:17 ` [tip: x86/fpu] " tip-bot2 for Chang S. Bae
2025-04-16 2:16 ` [PATCH 02/10] x86/fpu/apx: Define APX state component Chang S. Bae
2025-04-16 8:17 ` [tip: x86/fpu] " tip-bot2 for Chang S. Bae
2025-04-16 2:16 ` [PATCH 03/10] x86/fpu/apx: Disallow conflicting MPX presence Chang S. Bae
2025-04-16 8:17 ` [tip: x86/fpu] " tip-bot2 for Chang S. Bae
2025-04-16 2:16 ` [PATCH 04/10] x86/fpu/apx: Enable APX state support Chang S. Bae
2025-04-16 8:17 ` [tip: x86/fpu] " tip-bot2 for Chang S. Bae
2025-04-16 2:16 ` [PATCH 05/10] selftests/x86/apx: Add APX test Chang S. Bae
2025-04-16 8:17 ` [tip: x86/fpu] " tip-bot2 for Chang S. Bae
2025-04-16 2:16 ` [PATCH 06/10] x86/fpu: Log XSAVE disablement consistently Chang S. Bae
2025-04-16 8:17 ` [tip: x86/fpu] " tip-bot2 for Chang S. Bae
2025-04-16 16:56 ` [PATCH 06/10] " Sohil Mehta
2025-04-16 17:03 ` Chang S. Bae
2025-04-16 18:04 ` Sohil Mehta
2025-04-16 2:16 ` Chang S. Bae [this message]
2025-04-16 8:05 ` [PATCH 07/10] x86/fpu: Refactor xfeature bitmask update code for sigframe XSAVE Ingo Molnar
2025-04-16 16:55 ` Chang S. Bae
2025-04-16 8:17 ` [tip: x86/fpu] " tip-bot2 for Chang S. Bae
2025-04-16 2:16 ` [PATCH 08/10] x86/pkeys: Simplify PKRU update in signal frame Chang S. Bae
2025-04-16 8:17 ` [tip: x86/fpu] " tip-bot2 for Chang S. Bae
2025-04-16 2:16 ` [PATCH 09/10] x86/fpu: Remove export of mxcsr_feature_mask Chang S. Bae
2025-04-16 8:17 ` [tip: x86/fpu] " tip-bot2 for Chang S. Bae
2025-04-16 2:17 ` [PATCH 10/10] x86/fpu: Rename fpu_reset_fpregs() to fpu_reset_fpstate_regs() Chang S. Bae
2025-04-16 8:17 ` [tip: x86/fpu] " tip-bot2 for Chang S. Bae
2025-04-16 8:07 ` [PATCH 00/10] x86/fpu: APX enablement and assorted FPU code improvements Ingo Molnar
2025-04-16 16:56 ` Chang S. Bae
2025-03-20 23:42 ` [PATCH RFC v2 6/9] x86/fpu/apx: Define APX state component Chang S. Bae
2025-04-11 22:54 ` Sohil Mehta
2025-03-20 23:42 ` [PATCH RFC v2 7/9] x86/fpu/apx: Disallow conflicting MPX presence Chang S. Bae
2025-04-14 17:09 ` Sohil Mehta
2025-04-14 17:25 ` Dave Hansen
2025-03-20 23:42 ` [PATCH RFC v2 8/9] x86/fpu/apx: Enable APX state support Chang S. Bae
2025-04-14 15:41 ` Sohil Mehta
2025-03-20 23:43 ` [PATCH RFC v2 9/9] selftests/x86/apx: Add APX test Chang S. Bae
2025-04-14 16:02 ` Sohil Mehta
2025-03-25 10:25 ` [PATCH RFC v2 0/9] x86: Support Intel Advanced Performance Extensions Ingo Molnar
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