Re: [PATCH RFC v2a 5/9] x86/cpufeatures: Add X86_FEATURE_APX

[Sohil Mehta <sohil.mehta@intel.com>]

On 4/11/2025 9:12 AM, Chang S. Bae wrote:

> diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
> index 6c2c152d8a67..5445937eff3d 100644
> --- a/arch/x86/include/asm/cpufeatures.h
> +++ b/arch/x86/include/asm/cpufeatures.h
> @@ -481,6 +481,7 @@
>  #define X86_FEATURE_AMD_HETEROGENEOUS_CORES (21*32 + 6) /* Heterogeneous Core Topology */
>  #define X86_FEATURE_AMD_WORKLOAD_CLASS	(21*32 + 7) /* Workload Classification */
>  #define X86_FEATURE_PREFER_YMM		(21*32 + 8) /* Avoid ZMM registers due to downclocking */
> +#define X86_FEATURE_APX			(21*32 + 9) /* Advanced #Performance Extensions */
>  

Is the '#' before 'Performance' intentional? The previous version didn't
seem to have it.

>  /*
>   * BUG word(s)
> diff --git a/arch/x86/kernel/cpu/cpuid-deps.c b/arch/x86/kernel/cpu/cpuid-deps.c
> index 94c062cddfa4..7c1268138a7a 100644
> --- a/arch/x86/kernel/cpu/cpuid-deps.c
> +++ b/arch/x86/kernel/cpu/cpuid-deps.c
> @@ -88,6 +88,7 @@ static const struct cpuid_dep cpuid_deps[] = {
>  	{ X86_FEATURE_SHSTK,			X86_FEATURE_XSAVES    },
>  	{ X86_FEATURE_FRED,			X86_FEATURE_LKGS      },
>  	{ X86_FEATURE_SPEC_CTRL_SSBD,		X86_FEATURE_SPEC_CTRL },
> +	{ X86_FEATURE_APX,			X86_FEATURE_XSAVE     },

I don't think this table follows any specific logic, but recent patches
have tried grouping by similar features or features with similar
dependencies.

I don't have a preference, but should this be inserted closer to other
XSAVE dependent features?

    { X86_FEATURE_PKU,                      X86_FEATURE_XSAVE     },
    { X86_FEATURE_MPX,                      X86_FEATURE_XSAVE     },
    { X86_FEATURE_XGETBV1,                  X86_FEATURE_XSAVE     },
+   { X86_FEATURE_APX,                      X86_FEATURE_XSAVE     },
    { X86_FEATURE_CMOV,                     X86_FEATURE_FXSR      },


>  	{}
>  };
>  
> diff --git a/arch/x86/kernel/cpu/scattered.c b/arch/x86/kernel/cpu/scattered.c
> index 16f3ca30626a..6c40d5af8479 100644
> --- a/arch/x86/kernel/cpu/scattered.c
> +++ b/arch/x86/kernel/cpu/scattered.c
> @@ -54,6 +54,7 @@ static const struct cpuid_bit cpuid_bits[] = {
>  	{ X86_FEATURE_AMD_LBR_V2,		CPUID_EAX,  1, 0x80000022, 0 },
>  	{ X86_FEATURE_AMD_LBR_PMC_FREEZE,	CPUID_EAX,  2, 0x80000022, 0 },
>  	{ X86_FEATURE_AMD_HETEROGENEOUS_CORES,	CPUID_EAX, 30, 0x80000026, 0 },
> +	{ X86_FEATURE_APX,			CPUID_EDX, 21, 0x00000007, 1 },

There is a comment on top of that table that says:
"Please keep the leaf sorted by cpuid_bit.level for faster search."

Based on that, APX should be inserted here:

 { X86_FEATURE_INTEL_PPIN,               CPUID_EBX,  0, 0x00000007, 1 },
+{ X86_FEATURE_APX,                      CPUID_EDX, 21, 0x00000007, 1 },
 { X86_FEATURE_RRSBA_CTRL,               CPUID_EDX,  2, 0x00000007, 2 },

>  	{ 0, 0, 0, 0, 0 }
>  };
>