From: Sean Anderson <sean.anderson@linux.dev>
To: Mark Brown <broonie@kernel.org>,
Michal Simek <michal.simek@amd.com>,
linux-spi@vger.kernel.org
Cc: Jinjie Ruan <ruanjinjie@huawei.com>,
Miquel Raynal <miquel.raynal@bootlin.com>,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org,
David Lechner <dlechner@baylibre.com>,
Amit Kumar Mahapatra <amit.kumar-mahapatra@amd.com>,
Sean Anderson <sean.anderson@linux.dev>,
Conor Dooley <conor+dt@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Rob Herring <robh@kernel.org>,
devicetree@vger.kernel.org
Subject: [PATCH v2 2/9] dt-bindings: spi: zynqmp-qspi: Add example dual upper/lower bus
Date: Mon, 16 Jun 2025 18:00:47 -0400 [thread overview]
Message-ID: <20250616220054.3968946-3-sean.anderson@linux.dev> (raw)
In-Reply-To: <20250616220054.3968946-1-sean.anderson@linux.dev>
Add an example of the spi-buses property showcasing how to have devices
on both the upper and lower buses.
Signed-off-by: Sean Anderson <sean.anderson@linux.dev>
---
Changes in v2:
- New
.../bindings/spi/spi-zynqmp-qspi.yaml | 22 ++++++++++++++++++-
1 file changed, 21 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/spi/spi-zynqmp-qspi.yaml b/Documentation/devicetree/bindings/spi/spi-zynqmp-qspi.yaml
index 02cf1314367b..c6a57fbb9dcf 100644
--- a/Documentation/devicetree/bindings/spi/spi-zynqmp-qspi.yaml
+++ b/Documentation/devicetree/bindings/spi/spi-zynqmp-qspi.yaml
@@ -69,7 +69,7 @@ examples:
#address-cells = <2>;
#size-cells = <2>;
- qspi: spi@ff0f0000 {
+ qspi: spi-controller@ff0f0000 {
compatible = "xlnx,zynqmp-qspi-1.0";
clocks = <&zynqmp_clk 53>, <&zynqmp_clk 82>;
clock-names = "ref_clk", "pclk";
@@ -77,5 +77,25 @@ examples:
interrupt-parent = <&gic>;
reg = <0x0 0xff0f0000 0x0 0x1000>,
<0x0 0xc0000000 0x0 0x8000000>;
+ num-cs = <3>;
+ cs-gpios = <0>, <0>, <&gpio 5>;
+
+ flash@0 {
+ reg = <0>;
+ spi-buses = <0>;
+ compatible = "jedec,spi-nor";
+ };
+
+ flash@1 {
+ reg = <1>;
+ spi-buses = <1>;
+ compatible = "jedec,spi-nor";
+ };
+
+ flash@2 {
+ reg = <2>;
+ spi-buses = <0>;
+ compatible = "jedec,spi-nor";
+ };
};
};
--
2.35.1.1320.gc452695387.dirty
next prev parent reply other threads:[~2025-06-16 22:01 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-16 22:00 [PATCH v2 0/9] spi: zynqmp-gqspi: Support multiple buses and add GPIO support Sean Anderson
2025-06-16 22:00 ` [PATCH v2 1/9] dt-bindings: spi: Add spi-buses property Sean Anderson
2025-06-17 6:05 ` Krzysztof Kozlowski
2025-08-14 20:55 ` David Lechner
2025-08-14 21:15 ` Sean Anderson
2025-08-14 21:17 ` David Lechner
2025-08-14 21:34 ` Sean Anderson
2025-08-14 22:08 ` Mark Brown
2025-08-15 15:49 ` David Lechner
2025-08-18 8:28 ` Miquel Raynal
2025-08-18 14:55 ` Sean Anderson
2025-08-18 15:22 ` David Lechner
2025-08-18 14:56 ` Sean Anderson
2025-08-18 15:26 ` David Lechner
2025-06-16 22:00 ` Sean Anderson [this message]
2025-06-17 1:59 ` [PATCH v2 2/9] dt-bindings: spi: zynqmp-qspi: Add example dual upper/lower bus Rob Herring (Arm)
2025-06-18 18:27 ` David Lechner
2025-06-19 16:20 ` Sean Anderson
2025-06-19 16:29 ` David Lechner
2025-06-16 22:00 ` [PATCH v2 3/9] spi: Support multi-bus controllers Sean Anderson
2025-06-16 22:00 ` [PATCH v2 4/9] spi: Add flag to determine default bus Sean Anderson
2025-06-16 22:00 ` [PATCH v2 5/9] spi: zynqmp-gqspi: Support multiple buses Sean Anderson
2025-06-16 23:10 ` David Lechner
2025-06-17 13:21 ` kernel test robot
2025-06-16 22:00 ` [PATCH v2 6/9] spi: zynqmp-gqspi: Pass speed directly to config_op Sean Anderson
2025-06-16 22:00 ` [PATCH v2 7/9] spi: zynqmp-gqspi: Configure SPI mode dynamically Sean Anderson
2025-06-16 22:00 ` [PATCH v2 8/9] spi: zynqmp-gqspi: Support GPIO chip selects Sean Anderson
2025-06-16 22:00 ` [PATCH v2 9/9] ARM64: xilinx: zynqmp: Add spi-buses property Sean Anderson
2025-06-17 6:07 ` Krzysztof Kozlowski
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