From: Sean Anderson <sean.anderson@linux.dev>
To: Mark Brown <broonie@kernel.org>,
Michal Simek <michal.simek@amd.com>,
linux-spi@vger.kernel.org
Cc: Jinjie Ruan <ruanjinjie@huawei.com>,
Miquel Raynal <miquel.raynal@bootlin.com>,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org,
David Lechner <dlechner@baylibre.com>,
Amit Kumar Mahapatra <amit.kumar-mahapatra@amd.com>,
Sean Anderson <sean.anderson@linux.dev>
Subject: [PATCH v2 4/9] spi: Add flag to determine default bus
Date: Mon, 16 Jun 2025 18:00:49 -0400 [thread overview]
Message-ID: <20250616220054.3968946-5-sean.anderson@linux.dev> (raw)
In-Reply-To: <20250616220054.3968946-1-sean.anderson@linux.dev>
The ZynqMP GQSPI driver determines the default SPI bus based on the chip
select. For compatibility, introduce a flag to determine the buses from
the chipselect when the spi-buses property is absent.
Signed-off-by: Sean Anderson <sean.anderson@linux.dev>
---
Changes in v2:
- New
drivers/spi/spi.c | 7 ++++++-
include/linux/spi/spi.h | 2 ++
2 files changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c
index 9fbf069623a8..d9d0c24cee0b 100644
--- a/drivers/spi/spi.c
+++ b/drivers/spi/spi.c
@@ -2470,7 +2470,12 @@ static int of_spi_parse_dt(struct spi_controller *ctlr, struct spi_device *spi,
if (rc == -EINVAL) {
/* Default when property is omitted. */
- spi->buses = BIT(0);
+ if ((ctlr->flags & SPI_CONTROLLER_DEFAULT_BUS_IS_CS) &&
+ cs[0] != SPI_INVALID_CS && cs[0] < ctlr->num_buses) {
+ spi->buses = BIT(cs[0]);
+ } else {
+ spi->buses = BIT(0);
+ }
} else {
for (idx = 0; idx < rc; idx++) {
if (buses[idx] >= ctlr->num_buses) {
diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h
index 70e8e6555a33..cea93b0895b9 100644
--- a/include/linux/spi/spi.h
+++ b/include/linux/spi/spi.h
@@ -621,6 +621,8 @@ struct spi_controller {
* assert/de-assert more than one chip select at once.
*/
#define SPI_CONTROLLER_MULTI_CS BIT(7)
+ /* spi_device->buses defaults to spi_device->cs[0] */
+#define SPI_CONTROLLER_DEFAULT_BUS_IS_CS BIT(8)
/* Flag indicating if the allocation of this struct is devres-managed */
bool devm_allocated;
--
2.35.1.1320.gc452695387.dirty
next prev parent reply other threads:[~2025-06-16 22:01 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-16 22:00 [PATCH v2 0/9] spi: zynqmp-gqspi: Support multiple buses and add GPIO support Sean Anderson
2025-06-16 22:00 ` [PATCH v2 1/9] dt-bindings: spi: Add spi-buses property Sean Anderson
2025-06-17 6:05 ` Krzysztof Kozlowski
2025-08-14 20:55 ` David Lechner
2025-08-14 21:15 ` Sean Anderson
2025-08-14 21:17 ` David Lechner
2025-08-14 21:34 ` Sean Anderson
2025-08-14 22:08 ` Mark Brown
2025-08-15 15:49 ` David Lechner
2025-08-18 8:28 ` Miquel Raynal
2025-08-18 14:55 ` Sean Anderson
2025-08-18 15:22 ` David Lechner
2025-08-18 14:56 ` Sean Anderson
2025-08-18 15:26 ` David Lechner
2025-06-16 22:00 ` [PATCH v2 2/9] dt-bindings: spi: zynqmp-qspi: Add example dual upper/lower bus Sean Anderson
2025-06-17 1:59 ` Rob Herring (Arm)
2025-06-18 18:27 ` David Lechner
2025-06-19 16:20 ` Sean Anderson
2025-06-19 16:29 ` David Lechner
2025-06-16 22:00 ` [PATCH v2 3/9] spi: Support multi-bus controllers Sean Anderson
2025-06-16 22:00 ` Sean Anderson [this message]
2025-06-16 22:00 ` [PATCH v2 5/9] spi: zynqmp-gqspi: Support multiple buses Sean Anderson
2025-06-16 23:10 ` David Lechner
2025-06-17 13:21 ` kernel test robot
2025-06-16 22:00 ` [PATCH v2 6/9] spi: zynqmp-gqspi: Pass speed directly to config_op Sean Anderson
2025-06-16 22:00 ` [PATCH v2 7/9] spi: zynqmp-gqspi: Configure SPI mode dynamically Sean Anderson
2025-06-16 22:00 ` [PATCH v2 8/9] spi: zynqmp-gqspi: Support GPIO chip selects Sean Anderson
2025-06-16 22:00 ` [PATCH v2 9/9] ARM64: xilinx: zynqmp: Add spi-buses property Sean Anderson
2025-06-17 6:07 ` Krzysztof Kozlowski
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