Re: [PATCH v2 5/9] spi: zynqmp-gqspi: Support multiple buses

[kernel test robot <lkp@intel.com>]

Hi Sean,

kernel test robot noticed the following build errors:

[auto build test ERROR on broonie-spi/for-next]
[also build test ERROR on linus/master v6.16-rc2 next-20250617]
[cannot apply to xilinx-xlnx/master]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/Sean-Anderson/dt-bindings-spi-Add-spi-buses-property/20250617-060356
base:   https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-next
patch link:    https://lore.kernel.org/r/20250616220054.3968946-6-sean.anderson%40linux.dev
patch subject: [PATCH v2 5/9] spi: zynqmp-gqspi: Support multiple buses
config: sparc-randconfig-001-20250617 (https://download.01.org/0day-ci/archive/20250617/202506172150.MoosHW24-lkp@intel.com/config)
compiler: sparc-linux-gcc (GCC) 12.4.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250617/202506172150.MoosHW24-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202506172150.MoosHW24-lkp@intel.com/

All errors (new ones prefixed by >>):

   drivers/spi/spi-zynqmp-gqspi.c: In function 'zynqmp_qspi_chipselect':
>> drivers/spi/spi-zynqmp-gqspi.c:469:25: error: implicit declaration of function 'FIELD_PREP' [-Werror=implicit-function-declaration]
     469 |                         FIELD_PREP(GQSPI_GENFIFO_BUS_MASK, qspi->buses);
         |                         ^~~~~~~~~~
   cc1: some warnings being treated as errors


vim +/FIELD_PREP +469 drivers/spi/spi-zynqmp-gqspi.c

   453	
   454	/**
   455	 * zynqmp_qspi_chipselect - Select or deselect the chip select line
   456	 * @qspi:	Pointer to the spi_device structure
   457	 * @is_high:	Select(0) or deselect (1) the chip select line
   458	 */
   459	static void zynqmp_qspi_chipselect(struct spi_device *qspi, bool is_high)
   460	{
   461		struct zynqmp_qspi *xqspi = spi_controller_get_devdata(qspi->controller);
   462		ulong timeout;
   463		u32 genfifoentry = 0, statusreg;
   464	
   465		genfifoentry |= GQSPI_GENFIFO_MODE_SPI;
   466	
   467		if (!is_high) {
   468			xqspi->genfifobus =
 > 469				FIELD_PREP(GQSPI_GENFIFO_BUS_MASK, qspi->buses);
   470			if (!spi_get_chipselect(qspi, 0))
   471				xqspi->genfifocs = GQSPI_GENFIFO_CS_LOWER;
   472			else
   473				xqspi->genfifocs = GQSPI_GENFIFO_CS_UPPER;
   474	
   475			genfifoentry |= xqspi->genfifobus;
   476			genfifoentry |= xqspi->genfifocs;
   477			genfifoentry |= GQSPI_GENFIFO_CS_SETUP;
   478		} else {
   479			genfifoentry |= GQSPI_GENFIFO_CS_HOLD;
   480		}
   481	
   482		zynqmp_gqspi_write(xqspi, GQSPI_GEN_FIFO_OFST, genfifoentry);
   483	
   484		/* Manually start the generic FIFO command */
   485		zynqmp_gqspi_write(xqspi, GQSPI_CONFIG_OFST,
   486				   zynqmp_gqspi_read(xqspi, GQSPI_CONFIG_OFST) |
   487				   GQSPI_CFG_START_GEN_FIFO_MASK);
   488	
   489		timeout = jiffies + msecs_to_jiffies(1000);
   490	
   491		/* Wait until the generic FIFO command is empty */
   492		do {
   493			statusreg = zynqmp_gqspi_read(xqspi, GQSPI_ISR_OFST);
   494	
   495			if ((statusreg & GQSPI_ISR_GENFIFOEMPTY_MASK) &&
   496			    (statusreg & GQSPI_ISR_TXEMPTY_MASK))
   497				break;
   498			cpu_relax();
   499		} while (!time_after_eq(jiffies, timeout));
   500	
   501		if (time_after_eq(jiffies, timeout))
   502			dev_err(xqspi->dev, "Chip select timed out\n");
   503	}
   504	

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