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From: Jonathan Cameron <Jonathan.Cameron@huawei.com>
To: James Morse <james.morse@arm.com>
Cc: <linux-kernel@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	"Greg Kroah-Hartman" <gregkh@linuxfoundation.org>,
	"Rafael J . Wysocki" <rafael@kernel.org>, <sudeep.holla@arm.com>,
	Rob Herring <robh@kernel.org>, Ben Horgan <ben.horgan@arm.com>
Subject: Re: [PATCH 5/5] cacheinfo: Add helper to find the cache size from cpu+level
Date: Tue, 17 Jun 2025 17:28:08 +0100	[thread overview]
Message-ID: <20250617172808.00005c14@huawei.com> (raw)
In-Reply-To: <20250613130356.8080-6-james.morse@arm.com>

On Fri, 13 Jun 2025 13:03:56 +0000
James Morse <james.morse@arm.com> wrote:

> The MPAM driver needs to know the size of a cache associated with a
> particular CPU. The DT/ACPI agnostic way of doing this is to ask cacheinfo.
> 
> Add a helper to do this.
> 
> Signed-off-by: James Morse <james.morse@arm.com>



> ---
>  include/linux/cacheinfo.h | 20 ++++++++++++++++++++
>  1 file changed, 20 insertions(+)
> 
> diff --git a/include/linux/cacheinfo.h b/include/linux/cacheinfo.h
> index 9c959caf8af8..3f1b6b2e25b5 100644
> --- a/include/linux/cacheinfo.h
> +++ b/include/linux/cacheinfo.h
> @@ -148,6 +148,26 @@ static inline int get_cpu_cacheinfo_id(int cpu, int level)
>  	return ci ? ci->id : -1;
>  }
>  
> +/*
> + * Get the size of the cache associated with @cpu at level @level.
> + * cpuhp lock must be held.
To me kernel-doc would be appropriate.  Particularly the return 0 thing.
However there isn't any for existing cacheinfo interfaces so maybe
fair enough to 'follow local style' on that.

> + */
> +static inline unsigned int get_cpu_cacheinfo_size(int cpu, int level)
> +{
> +	struct cpu_cacheinfo *ci = get_cpu_cacheinfo(cpu);
> +	int i;
> +
> +	if (!ci->info_list)
> +		return 0;
> +
> +	for (i = 0; i < ci->num_leaves; i++) {
> +		if (ci->info_list[i].level == level)
> +			return ci->info_list[i].size;
> +	}
> +
> +	return 0;
> +}
> +
Why not

static inline unsigned int get_cpu_cacheinfo_size(int cpu, int level)
{
	struct cpu_cachinfo *ci = get_cpu_cacheinfo_level(cpu, lev);

	return ci ? ci->size; 0;
}

Like existing get_cpu_cacheinfo_id()?

>  #if defined(CONFIG_ARM64) || defined(CONFIG_ARM)
>  #define use_arch_cache_info()	(true)
>  #else


  reply	other threads:[~2025-06-17 16:28 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-06-13 13:03 [PATCH 0/5] cacheinfo: Set cache 'id' based on DT data James Morse
2025-06-13 13:03 ` [PATCH 1/5] " James Morse
2025-06-17 16:03   ` Jonathan Cameron
2025-06-23 14:18     ` Rob Herring
2025-06-27 16:38       ` James Morse
2025-06-13 13:03 ` [PATCH 2/5] cacheinfo: Add arch hook to compress CPU h/w id into 32 bits for cache-id James Morse
2025-06-17 16:05   ` Jonathan Cameron
2025-06-23 14:48   ` Rob Herring
2025-06-27 16:38     ` James Morse
2025-06-30 19:43       ` Rob Herring
2025-07-04 17:39         ` James Morse
2025-07-07 17:41           ` Rob Herring
2025-06-13 13:03 ` [PATCH 3/5] arm64: cacheinfo: Provide helper to compress MPIDR value into u32 James Morse
2025-06-17 16:14   ` Jonathan Cameron
2025-06-27 16:39     ` James Morse
2025-06-13 13:03 ` [PATCH 4/5] cacheinfo: Expose the code to generate a cache-id from a device_node James Morse
2025-06-17 16:21   ` Jonathan Cameron
2025-06-27  5:54     ` Shaopeng Tan (Fujitsu)
2025-06-27 16:39       ` James Morse
2025-06-27 16:38     ` James Morse
2025-06-13 13:03 ` [PATCH 5/5] cacheinfo: Add helper to find the cache size from cpu+level James Morse
2025-06-17 16:28   ` Jonathan Cameron [this message]
2025-06-27 16:38     ` James Morse
2025-06-23 15:05 ` [PATCH 0/5] cacheinfo: Set cache 'id' based on DT data Rob Herring
2025-06-27 16:38   ` James Morse

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