Re: [PATCH v3 3/3] iommu/amd: Invalidate IRT cache for DMA aliases

[Magnus Kalland <magnus@dolphinics.com>]

Hi Vasant, and thank you for the review.

On Mon, Mar 30, 2026 at 04:48:23PM +0530, Vasant Hegde wrote:
> There is a possible deadlock. Actually we can remove lock here?


> path 1) alloc_irq_table() -> holds iommu_table_lock [A] -> iommu->lock [B]
> path 2) iommu_flush_irt_and_complete -> holds iommu->lock [B] ->
> iommu_table_lock [A]

You are correct, there is a possible deadlock. We can avoid it by grabbing
iommu_table_lock, creating a local copy of the aliases, releasing it, then
flushing the aliases. This way, there is no nested locking in
iommu_flush_irt_and_complete.

We notice that the alias table is read in other paths without holding
iommu_table_lock (amd_iommu_change_top, setup_aliases). If we can do the same,
then that is of course another way to avoid the deadlock. What do you think?

> > +
> > +	for (devid = 0; devid <= pci_seg->last_bdf; ++devid) {
> > +		if (pci_seg->alias_table[devid] != alias)

> This is heavy hammer. Why not use pci_for_each_dma_alias() like we do in DTE
> flush path?

Agree this is heavy.

We cannot use pci_for_each_dma_alias. See the reply to our v1:
https://lore.kernel.org/linux-iommu/26cfa307-6c33-41f9-a7a0-fbf202b38a00@amd.com/

However, we have a v4 ready doing 256 loop iterations instead, since aliases
are always on the same bus. I think that's a better approach.
What do you think?

Thanks,
Magnus

Signed-off-by: Magnus Kalland <magnus@dolphinics.com>