From: Magnus Kalland <magnus@dolphinics.com>
To: vasant.hegde@amd.com
Cc: DheerajKumar.Srivastava@amd.com, dhsrivas@amd.com,
iommu@lists.linux.dev, jonas@dolphinics.com, joro@8bytes.org,
larsk@dolphinics.com, linux-kernel@vger.kernel.org,
magnus@dolphinics.com, suravee.suthikulpanit@amd.com,
torel@simula.no
Subject: Re: [PATCH v3 3/3] iommu/amd: Invalidate IRT cache for DMA aliases
Date: Wed, 1 Apr 2026 12:34:56 +0200 [thread overview]
Message-ID: <20260401103559.63865-1-magnus@dolphinics.com> (raw)
In-Reply-To: <122231f6-3aa4-4f7e-a663-a182460c9436@amd.com>
Hi Vasant,
> I went back to those reports and reviewed it again. It looks like
> pci_get_domain_bus_and_slot() takes spinlock which is causing the lockdep issue.
> I think V2 is good w/ some changes to get the pdev.
> Instead of pci_get_domain_bus_and_slot(), we should use dev_data (like we do in
> other places).
> >
> > However, we have a v4 ready doing 256 loop iterations instead, since aliases
> > are always on the same bus. I think that's a better approach.
> > What do you think?
> Its a performance sensitive code path. Also during init path, dma aliases are
> set properly. I think we should go w/ pci)fir_each_dma_alias -> flush irte path.
> I have added below fix on top of your v2 and did some sanity tests. So far it
> looks good. I have requested Dheeraj to rerun the tests.
> (https://lore.kernel.org/linux-iommu/20260205140059.11857-2-magnus@dolphinics.com/)
> -Vasant
> diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c
> index 050178cf388f..eb23b9e7bf03 100644
> --- a/drivers/iommu/amd/iommu.c
> +++ b/drivers/iommu/amd/iommu.c
> @@ -3118,12 +3118,10 @@ static void iommu_flush_irt_and_complete(struct
> amd_iommu *iommu, u16 devid)
>{
> int ret;
> u64 data;
> - int domain = iommu->pci_seg->id;
> - unsigned int bus = PCI_BUS_NUM(devid);
> - unsigned int devfn = devid & 0xff;
> unsigned long flags;
> struct iommu_cmd cmd;
> struct pci_dev *pdev = NULL;
> + struct iommu_dev_data *dev_data = search_dev_data(iommu, devid);
>
> if (iommu->irtcachedis_enabled)
> return;
> @@ -3131,11 +3129,12 @@ static void iommu_flush_irt_and_complete(struct
> amd_iommu *iommu, u16 devid)
> data = atomic64_inc_return(&iommu->cmd_sem_val);
> build_completion_wait(&cmd, iommu, data);
>
> - pdev = pci_get_domain_bus_and_slot(domain, bus, devfn);
> + if (dev_data && dev_data->dev && dev_is_pci(dev_data->dev))
> + pdev = to_pci_dev(dev_data->dev);
> +
> raw_spin_lock_irqsave(&iommu->lock, flags);
> if (pdev) {
> ret = pci_for_each_dma_alias(pdev, iommu_flush_dev_irt, iommu);
> - pci_dev_put(pdev);
> } else {
> ret = iommu_flush_dev_irt(NULL, devid, iommu);
> }
Thanks for the fix. I've tested it and it looks good on our end.
Currently the v2 does not apply to next. Should I send a v4 with
your changes that applies cleanly?
Magnus
next prev parent reply other threads:[~2026-04-01 10:36 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-02-25 20:23 [PATCH v3 0/3] " Magnus Kalland
2026-02-25 20:23 ` [PATCH v3 1/3] iommu/amd: Use raw spinlock for interrupt remapping tables Magnus Kalland
2026-03-30 15:23 ` Vasant Hegde
2026-03-31 13:10 ` Magnus Kalland
2026-02-25 20:23 ` [PATCH v3 2/3] iommu/amd: Track PCIe DMA aliases in set_remap_table_entry_alias Magnus Kalland
2026-02-25 20:23 ` [PATCH v3 3/3] iommu/amd: Invalidate IRT cache for DMA aliases Magnus Kalland
2026-03-30 11:18 ` Vasant Hegde
2026-03-31 12:48 ` Magnus Kalland
2026-04-01 7:44 ` Vasant Hegde
2026-04-01 10:34 ` Magnus Kalland [this message]
2026-04-01 10:46 ` Vasant Hegde
2026-04-01 11:38 ` Magnus Kalland
2026-03-06 9:22 [PATCH v3 0/3] " Magnus Kalland
2026-03-06 9:22 ` [PATCH v3 3/3] " Magnus Kalland
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