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From: Akash Kumar <akash.kumar@oss.qualcomm.com>
To: Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Bjorn Andersson <andersson@kernel.org>,
	Konrad Dybcio <konradybcio@kernel.org>,
	Rob Herring <robh@kernel.org>,
	Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>
Cc: linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org
Subject: [PATCH 2/3] arm64: dts: qcom: monaco-monza-som: Enable USB0 DRD mode
Date: Wed, 20 May 2026 15:07:33 +0530	[thread overview]
Message-ID: <20260520093902.2064730-3-akash.kumar@oss.qualcomm.com> (raw)
In-Reply-To: <20260520093902.2064730-1-akash.kumar@oss.qualcomm.com>

Enable USB0 dual-role mode on monza SOM using the Cypress CYPD6129 UCSI
controller.

Switch the controller node to I2C12, configure the required pinctrl and
interrupt settings, and wire the USB2/USB3 endpoints for the USB-C
connector.

Signed-off-by: Akash Kumar <akash.kumar@oss.qualcomm.com>
---
 .../arm64/boot/dts/qcom/monaco-monza-som.dtsi | 57 +++++++++++++++++++
 1 file changed, 57 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/monaco-monza-som.dtsi b/arch/arm64/boot/dts/qcom/monaco-monza-som.dtsi
index 9b5ed55939b8..8e3af6018dfc 100644
--- a/arch/arm64/boot/dts/qcom/monaco-monza-som.dtsi
+++ b/arch/arm64/boot/dts/qcom/monaco-monza-som.dtsi
@@ -194,6 +194,52 @@ &iris {
 	status = "okay";
 };
 
+&i2c12 {
+	pinctrl-0 = <&qup_i2c12_data_clk>, <&usb0_intr_state>;
+	pinctrl-names = "default";
+	status = "okay";
+
+	typec@8 {
+		compatible = "cypress,cypd6129";
+		reg = <0x08>;
+		interrupt-parent = <&tlmm>;
+		interrupts = < 3 IRQ_TYPE_LEVEL_LOW>;
+
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "okay";
+
+		ccg_typec_con0: connector@0 {
+			compatible = "usb-c-connector";
+			reg = <0>;
+			label = "USB-C";
+			data-role = "dual";
+			power-role = "dual";
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				port@0 {
+					reg = <0>;
+
+					ucsi_ccg_hs: endpoint {
+						remote-endpoint = <&usb_1_dwc3_hs>;
+					};
+				};
+
+				port@1 {
+					reg = <1>;
+
+					ucsi_ccg_ss: endpoint {
+						remote-endpoint = <&usb_1_dwc3_ss>;
+					};
+				};
+			};
+		};
+	};
+};
+
 /* PCIe0 Gen4 x2 */
 &pcie0 {
 	iommu-map = <0x0 &pcie_smmu 0x0000 0x1>,
@@ -227,6 +273,11 @@ &pcie1_phy {
 	status = "okay";
 };
 
+&qup_i2c12_data_clk {
+	drive-strength = <2>;
+	bias-pull-up;
+};
+
 &qupv3_id_0 {
 	firmware-name = "qcom/qcs8300/qupv3fw.elf";
 
@@ -295,6 +346,12 @@ dp_hpd: dp-hpd-state {
 		function = "edp0_hot";
 		bias-disable;
 	};
+
+	usb0_intr_state: usb0-intr-state {
+		pins = "gpio3";
+		drive-strength = <2>;
+		bias-pull-up;
+	};
 };
 
 /* USB0 HS + SS */
-- 
2.43.0


  parent reply	other threads:[~2026-05-20  9:39 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-05-20  9:37 [PATCH 0/3] Add Cypress CYPD6129 UCSI support for monza SOM USB0 DRD Akash Kumar
2026-05-20  9:37 ` [PATCH 1/3] dt-bindings: usb: typec: Add Cypress CYPD6129 UCSI controller compatible Akash Kumar
2026-05-20 10:01   ` Dmitry Baryshkov
2026-05-20 10:06   ` Dmitry Baryshkov
2026-05-20 11:21   ` Krzysztof Kozlowski
2026-05-20 11:57   ` Rob Herring (Arm)
2026-05-20  9:37 ` Akash Kumar [this message]
2026-05-20 10:05   ` [PATCH 2/3] arm64: dts: qcom: monaco-monza-som: Enable USB0 DRD mode Dmitry Baryshkov
2026-05-20 10:08   ` Dmitry Baryshkov
2026-05-20 11:15   ` Konrad Dybcio
2026-05-20 11:22   ` Krzysztof Kozlowski
2026-05-20  9:37 ` [PATCH 3/3] usb: ucsi: ccg: Add support for CYPD6129 (CCG6) Akash Kumar
2026-05-20 10:07   ` Dmitry Baryshkov
2026-05-20 11:20   ` Krzysztof Kozlowski
2026-05-20 11:22 ` [PATCH 0/3] Add Cypress CYPD6129 UCSI support for monza SOM USB0 DRD Krzysztof Kozlowski

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