* [PATCH v3 1/5] arm64: dts: rockchip: Reset the NanoPi Zero2 PHY from the MDIO bus
2026-09-09 14:33 [PATCH v3 0/5] arm64: dts: rockchip: Add FriendlyElec NanoPi R28S 安容 via B4 Relay
@ 2026-09-09 14:33 ` 安容 via B4 Relay
2026-09-09 22:50 ` Andrey Korshunov
2026-09-09 14:33 ` [PATCH v3 2/5] dt-bindings: arm: rockchip: Add FriendlyElec NanoPi R28S 安容 via B4 Relay
` (3 subsequent siblings)
4 siblings, 1 reply; 11+ messages in thread
From: 安容 via B4 Relay @ 2026-09-09 14:33 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner
Cc: devicetree, linux-arm-kernel, linux-rockchip, linux-kernel,
Chukun Pan, jensen, Andrey Korshunov, Diederik de Haas,
安容
From: 安容 <HystericalDragons@proton.me>
The RGMII PHY reset is described in the PHY node, where it is applied
too late to be of use. __of_mdiobus_register() registers the bus before
walking its children, and for a PHY node without an explicit
ethernet-phy-idAAAA.BBBB compatible, fwnode_mdiobus_register_phy() calls
get_phy_device() to read the PHY ID over the bus before
phy_device_register() gets as far as requesting reset-gpios. A PHY that
the bootloader left in reset is therefore never found:
mdio_bus stmmac-0: MDIO device at address 1 is missing.
This happens with mainline U-Boot (generic-rk3528), which does not touch
the pin, and leaves the port dead.
Describe the reset on the MDIO bus instead. __mdiobus_register() asserts
and releases the bus level reset-gpios before any device on the bus is
registered, so the PHY responds whatever state the bootloader left it
in. There is only one PHY on mdio1, so a bus wide reset is equivalent.
The pin is muxed by the GPIO request itself, but keep gmac1_rstn_l
described: move it to the MAC, as the MDIO bus has no device of its own
to apply pinctrl to.
Fixes: b944112abef4 ("arm64: dts: rockchip: Add FriendlyElec NanoPi Zero2")
Reported-by: Andrey Korshunov <razor1702@gmail.com>
Closes: https://lore.kernel.org/r/20260909134716.879-1-razor1702@gmail.com
Signed-off-by: 安容 <HystericalDragons@proton.me>
---
arch/arm64/boot/dts/rockchip/rk3528-nanopi-zero2.dts | 11 +++++------
1 file changed, 5 insertions(+), 6 deletions(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3528-nanopi-zero2.dts b/arch/arm64/boot/dts/rockchip/rk3528-nanopi-zero2.dts
index 97d85124d2..f3e543d261 100644
--- a/arch/arm64/boot/dts/rockchip/rk3528-nanopi-zero2.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3528-nanopi-zero2.dts
@@ -215,7 +215,7 @@ &gmac1 {
phy-supply = <&vcc_3v3>;
pinctrl-names = "default";
pinctrl-0 = <&rgmii_miim>, <&rgmii_tx_bus2>, <&rgmii_rx_bus2>,
- <&rgmii_rgmii_clk>, <&rgmii_rgmii_bus>;
+ <&rgmii_rgmii_clk>, <&rgmii_rgmii_bus>, <&gmac1_rstn_l>;
status = "okay";
};
@@ -242,14 +242,13 @@ hym8563: rtc@51 {
};
&mdio1 {
+ reset-delay-us = <20000>;
+ reset-gpios = <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>;
+ reset-post-delay-us = <100000>;
+
rgmii_phy: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0x1>;
- pinctrl-names = "default";
- pinctrl-0 = <&gmac1_rstn_l>;
- reset-assert-us = <20000>;
- reset-deassert-us = <100000>;
- reset-gpios = <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>;
};
};
--
2.55.0
^ permalink raw reply [flat|nested] 11+ messages in thread* Re: [PATCH v3 1/5] arm64: dts: rockchip: Reset the NanoPi Zero2 PHY from the MDIO bus
2026-09-09 14:33 ` [PATCH v3 1/5] arm64: dts: rockchip: Reset the NanoPi Zero2 PHY from the MDIO bus 安容 via B4 Relay
@ 2026-09-09 22:50 ` Andrey Korshunov
2026-09-10 6:13 ` 安容
2026-09-11 6:55 ` Chukun Pan
0 siblings, 2 replies; 11+ messages in thread
From: Andrey Korshunov @ 2026-09-09 22:50 UTC (permalink / raw)
To: devnull+hystericaldragons.proton.me
Cc: HystericalDragons, amadeus, jensenhuang, diederik, heiko, robh,
krzk+dt, conor+dt, linux-rockchip, linux-arm-kernel, devicetree,
linux-kernel
On Wed Sep 9, 2026 at 10:33 PM CST, 安容 via B4 Relay wrote:
> Describe the reset on the MDIO bus instead. __mdiobus_register() asserts
> and releases the bus level reset-gpios before any device on the bus is
> registered, so the PHY responds whatever state the bootloader left it
> in.
Confirmed. And thanks for catching the deprecated properties I had
suggested - I had not read snps,dwmac.yaml, and dt-validate does not warn
on deprecated ones, so none of the checks I ran would have told me either.
I ran it both ways on a NanoPi R28S - same pin, same RTL8211F on mdio1 -
with two images that differ only in those nine lines of device tree. Both
are 6.18.44 with mainline U-Boot 2026.07 (generic-rk3528).
Reset in the PHY node, the way mainline describes it today:
[ 0.217516] mdio_bus stmmac-0: MDIO device at address 1 is missing.
[ 24.566496] rk_gmac-dwmac ffbe0000.ethernet eth0: cannot attach PHY
and the port stays down. Reset on the MDIO bus, as this patch does it:
[ 14.608938] rk_gmac-dwmac ffbe0000.ethernet eth0: PHY [stmmac-0:01] driver [RTL8211F Gigabit Ethernet] (irq=POLL)
[ 17.770103] rk_gmac-dwmac ffbe0000.ethernet eth0: Link is Up - 1Gbps/Full - flow control rx/tx
So U-Boot 2026.07 does leave the pin asserted, the same as the 2025.10 I
first saw this on - the commit message holds for the current release too,
not just the one I happened to report it from.
The one thing I cannot confirm is the board in the subject: this is an
R28S, not a Zero2, which I do not have.
Tested-by: Andrey Korshunov <razor1702@gmail.com>
Andrey
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v3 1/5] arm64: dts: rockchip: Reset the NanoPi Zero2 PHY from the MDIO bus
2026-09-09 22:50 ` Andrey Korshunov
@ 2026-09-10 6:13 ` 安容
2026-09-11 6:55 ` Chukun Pan
1 sibling, 0 replies; 11+ messages in thread
From: 安容 @ 2026-09-10 6:13 UTC (permalink / raw)
To: Andrey Korshunov
Cc: Chukun Pan, jensen, diederik, Heiko Stuebner, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, linux-rockchip,
linux-arm-kernel, devicetree, linux-kernel
Thanks for the test. It is better evidence than the Zero2 would have
given on its own. The mechanism lives in the MDIO core instead of the board:
`__mdiobus_register()` releases the bus reset before `get_phy_device()` reads
the ID, and the two boards wire the same RTL8211F to mdio1 behind the same
pin, so the R28S result carries to the Zero2. I have annotated the tag
accordingly:
Tested-by: Andrey Korshunov <razor1702@gmail.com> # NanoPi R28S
Good to know 2026.07 leaves the pin asserted as well. The commit message
does not name a U-Boot release, so it stands as written.
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v3 1/5] arm64: dts: rockchip: Reset the NanoPi Zero2 PHY from the MDIO bus
2026-09-09 22:50 ` Andrey Korshunov
2026-09-10 6:13 ` 安容
@ 2026-09-11 6:55 ` Chukun Pan
2026-09-11 10:10 ` 安容
1 sibling, 1 reply; 11+ messages in thread
From: Chukun Pan @ 2026-09-11 6:55 UTC (permalink / raw)
To: razor1702
Cc: HystericalDragons, amadeus, conor+dt, devicetree,
devnull+hystericaldragons.proton.me, diederik, heiko,
jensenhuang, krzk+dt, linux-arm-kernel, linux-kernel,
linux-rockchip, jonas
Hi,
> &mdio1 {
> + reset-delay-us = <20000>;
> + reset-gpios = <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>;
> + reset-post-delay-us = <100000>;
This is an incorrect change, see also: [1]
Since you are using mainline U-Boot 2026.07, you should have
already noticed that nanopi-zero2-rk3528 is available.
Therefore, the nanopi-zero2-rk3528 target should be used
instead of generic-rk3528.
[1] https://lore.kernel.org/lkml/1e8da54f-ef87-4d31-9a0a-17c0ff66bee0@kwiboo.se/
^ permalink raw reply [flat|nested] 11+ messages in thread* Re: [PATCH v3 1/5] arm64: dts: rockchip: Reset the NanoPi Zero2 PHY from the MDIO bus
2026-09-11 6:55 ` Chukun Pan
@ 2026-09-11 10:10 ` 安容
0 siblings, 0 replies; 11+ messages in thread
From: 安容 @ 2026-09-11 10:10 UTC (permalink / raw)
To: Chukun Pan
Cc: Conor Dooley, devicetree, diederik, Heiko Stuebner, jensen,
Krzysztof Kozlowski, linux-arm-kernel, linux-kernel,
linux-rockchip, jonas
Oh, sorry. You are right, and so was Jonas in his review of the identical H28K patch. I should think twice that thread before doing it. I was too hasty and failed to reflect the suggestion I had received. GPIO4_C2 resets the PHY, not the bus, and describing it under &mdio1 also breaks U-Boot, which reads `reset-gpios` from the PHY node ( `drivers/net/phy/phy.c` ) and lacks support for bus-level resets.
I had only tested generic-rk3528 and didn't check whether a nanopi-zero2-rk3528 target existed. Checking my own setup afterward, the R28S I develop on has indeed been booting a board-specific U-Boot target with the PHY-node reset all along, exactly as you pointed out.
I have droped this patch. And the remaining four only add R28S support. Thank you for you sharp point of view.
On Friday, September 11, 2026 at 2:55 PM, Chukun Pan <amadeus@jmu.edu.cn> wrote:
> Hi,
>
> > &mdio1 {
> > + reset-delay-us = <20000>;
> > + reset-gpios = <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>;
> > + reset-post-delay-us = <100000>;
>
> This is an incorrect change, see also: [1]
> Since you are using mainline U-Boot 2026.07, you should have
> already noticed that nanopi-zero2-rk3528 is available.
> Therefore, the nanopi-zero2-rk3528 target should be used
> instead of generic-rk3528.
>
> [1] https://lore.kernel.org/lkml/1e8da54f-ef87-4d31-9a0a-17c0ff66bee0@kwiboo.se/
>
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH v3 2/5] dt-bindings: arm: rockchip: Add FriendlyElec NanoPi R28S
2026-09-09 14:33 [PATCH v3 0/5] arm64: dts: rockchip: Add FriendlyElec NanoPi R28S 安容 via B4 Relay
2026-09-09 14:33 ` [PATCH v3 1/5] arm64: dts: rockchip: Reset the NanoPi Zero2 PHY from the MDIO bus 安容 via B4 Relay
@ 2026-09-09 14:33 ` 安容 via B4 Relay
2026-09-09 14:33 ` [PATCH v3 3/5] arm64: dts: rockchip: Split out the common NanoPi RK3528 parts 安容 via B4 Relay
` (2 subsequent siblings)
4 siblings, 0 replies; 11+ messages in thread
From: 安容 via B4 Relay @ 2026-09-09 14:33 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner
Cc: devicetree, linux-arm-kernel, linux-rockchip, linux-kernel,
Chukun Pan, jensen, Andrey Korshunov, Diederik de Haas,
Conor Dooley, 安容
From: 安容 <HystericalDragons@proton.me>
The NanoPi R28S is a dual gigabit Ethernet router board based on the
Rockchip RK3528 SoC.
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: 安容 <HystericalDragons@proton.me>
---
Documentation/devicetree/bindings/arm/rockchip.yaml | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml
index 81744fbee9..709e2cc44d 100644
--- a/Documentation/devicetree/bindings/arm/rockchip.yaml
+++ b/Documentation/devicetree/bindings/arm/rockchip.yaml
@@ -347,6 +347,11 @@ properties:
- friendlyarm,nanopi-r2s-plus
- const: rockchip,rk3328
+ - description: FriendlyElec NanoPi R28S
+ items:
+ - const: friendlyarm,nanopi-r28s
+ - const: rockchip,rk3528
+
- description: FriendlyElec NanoPi R3S
items:
- const: friendlyarm,nanopi-r3s
--
2.55.0
^ permalink raw reply [flat|nested] 11+ messages in thread* [PATCH v3 3/5] arm64: dts: rockchip: Split out the common NanoPi RK3528 parts
2026-09-09 14:33 [PATCH v3 0/5] arm64: dts: rockchip: Add FriendlyElec NanoPi R28S 安容 via B4 Relay
2026-09-09 14:33 ` [PATCH v3 1/5] arm64: dts: rockchip: Reset the NanoPi Zero2 PHY from the MDIO bus 安容 via B4 Relay
2026-09-09 14:33 ` [PATCH v3 2/5] dt-bindings: arm: rockchip: Add FriendlyElec NanoPi R28S 安容 via B4 Relay
@ 2026-09-09 14:33 ` 安容 via B4 Relay
2026-09-09 14:33 ` [PATCH v3 4/5] arm64: dts: rockchip: Add devicetree for the FriendlyElec NanoPi R28S 安容 via B4 Relay
2026-09-09 14:33 ` [PATCH v3 5/5] arm64: dts: rockchip: Follow the DTS coding style in the NanoPi RK3528 devicetrees 安容 via B4 Relay
4 siblings, 0 replies; 11+ messages in thread
From: 安容 via B4 Relay @ 2026-09-09 14:33 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner
Cc: devicetree, linux-arm-kernel, linux-rockchip, linux-kernel,
Chukun Pan, jensen, Andrey Korshunov, Diederik de Haas,
安容
From: 安容 <HystericalDragons@proton.me>
The FriendlyElec NanoPi Zero2 and the NanoPi R28S share their power
tree, storage, RGMII Ethernet, RTC and debug console. Move those parts
into rk3528-nanopi.dtsi so the NanoPi R28S can reuse them, and leave
only the board specific nodes in the NanoPi Zero2 devicetree.
Suggested-by: Chukun Pan <amadeus@jmu.edu.cn>
Signed-off-by: 安容 <HystericalDragons@proton.me>
---
.../boot/dts/rockchip/rk3528-nanopi-zero2.dts | 270 +-------------------
arch/arm64/boot/dts/rockchip/rk3528-nanopi.dtsi | 278 +++++++++++++++++++++
2 files changed, 279 insertions(+), 269 deletions(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3528-nanopi-zero2.dts b/arch/arm64/boot/dts/rockchip/rk3528-nanopi-zero2.dts
index f3e543d261..48e4273872 100644
--- a/arch/arm64/boot/dts/rockchip/rk3528-nanopi-zero2.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3528-nanopi-zero2.dts
@@ -2,41 +2,13 @@
/dts-v1/;
-#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
-#include <dt-bindings/pwm/pwm.h>
-#include "rk3528.dtsi"
+#include "rk3528-nanopi.dtsi"
/ {
model = "FriendlyElec NanoPi Zero2";
compatible = "friendlyarm,nanopi-zero2", "rockchip,rk3528";
- aliases {
- ethernet0 = &gmac1;
- i2c1 = &i2c1;
- mmc0 = &sdhci;
- mmc1 = &sdmmc;
- serial0 = &uart0;
- };
-
- chosen {
- stdout-path = "serial0:1500000n8";
- };
-
- adc-keys-0 {
- compatible = "adc-keys";
- io-channels = <&saradc 0>;
- io-channel-names = "buttons";
- keyup-threshold-microvolt = <1800000>;
- poll-interval = <100>;
-
- button-maskrom {
- label = "MASK";
- linux,code = <KEY_SETUP>;
- press-threshold-microvolt = <0>;
- };
- };
-
adc-keys-1 {
compatible = "adc-keys";
io-channels = <&saradc 1>;
@@ -83,66 +55,6 @@ vcc0v6_ddr: regulator-0v6-vcc-ddr {
vin-supply = <&vcc5v0_sys>;
};
- vdd_0v9: regulator-0v9-vdd {
- compatible = "regulator-fixed";
- regulator-name = "vdd_0v9";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <900000>;
- vin-supply = <&vcc5v0_sys>;
- };
-
- vcc_ddr: regulator-1v1-vcc-ddr {
- compatible = "regulator-fixed";
- regulator-name = "vcc_ddr";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1100000>;
- regulator-max-microvolt = <1100000>;
- vin-supply = <&vcc5v0_sys>;
- };
-
- vcc_1v8: regulator-1v8-vcc {
- compatible = "regulator-fixed";
- regulator-name = "vcc_1v8";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vcc_3v3>;
- };
-
- vcc_3v3: regulator-3v3-vcc {
- compatible = "regulator-fixed";
- regulator-name = "vcc_3v3";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vcc5v0_sys>;
- };
-
- vcc3v3_sd: regulator-3v3-vcc-sd {
- compatible = "regulator-fixed";
- gpios = <&gpio4 RK_PA1 GPIO_ACTIVE_LOW>;
- pinctrl-names = "default";
- pinctrl-0 = <&sdmmc_pwren_l>;
- regulator-name = "vcc3v3_sd";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vcc_3v3>;
- };
-
- vcc5v0_sys: regulator-5v0-vcc-sys {
- compatible = "regulator-fixed";
- regulator-name = "vcc5v0_sys";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- };
-
usb2_host_5v: regulator-5v0-usb2-host {
compatible = "regulator-fixed";
enable-active-high;
@@ -154,111 +66,9 @@ usb2_host_5v: regulator-5v0-usb2-host {
regulator-max-microvolt = <5000000>;
vin-supply = <&vcc5v0_sys>;
};
-
- vccio_sd: regulator-vccio-sd {
- compatible = "regulator-gpio";
- gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&sdmmc_vol_ctrl_h>;
- regulator-name = "vccio_sd";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
- states = <1800000 0x0>, <3300000 0x1>;
- vin-supply = <&vcc5v0_sys>;
- };
-
- vdd_arm: regulator-vdd-arm {
- compatible = "pwm-regulator";
- pwms = <&pwm1 0 5000 PWM_POLARITY_INVERTED>;
- pwm-supply = <&vcc5v0_sys>;
- regulator-name = "vdd_arm";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <746000>;
- regulator-max-microvolt = <1201000>;
- regulator-settling-time-up-us = <250>;
- };
-
- vdd_logic: regulator-vdd-logic {
- compatible = "pwm-regulator";
- pwms = <&pwm2 0 5000 PWM_POLARITY_INVERTED>;
- pwm-supply = <&vcc5v0_sys>;
- regulator-name = "vdd_logic";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <705000>;
- regulator-max-microvolt = <1006000>;
- regulator-settling-time-up-us = <250>;
- };
-};
-
-&cpu0 {
- cpu-supply = <&vdd_arm>;
-};
-
-&cpu1 {
- cpu-supply = <&vdd_arm>;
-};
-
-&cpu2 {
- cpu-supply = <&vdd_arm>;
-};
-
-&cpu3 {
- cpu-supply = <&vdd_arm>;
-};
-
-&gmac1 {
- clock_in_out = "output";
- phy-handle = <&rgmii_phy>;
- phy-mode = "rgmii-id";
- phy-supply = <&vcc_3v3>;
- pinctrl-names = "default";
- pinctrl-0 = <&rgmii_miim>, <&rgmii_tx_bus2>, <&rgmii_rx_bus2>,
- <&rgmii_rgmii_clk>, <&rgmii_rgmii_bus>, <&gmac1_rstn_l>;
- status = "okay";
-};
-
-&gpu {
- mali-supply = <&vdd_logic>;
- status = "okay";
-};
-
-&i2c1 {
- pinctrl-names = "default";
- pinctrl-0 = <&i2c1m0_xfer>;
- status = "okay";
-
- hym8563: rtc@51 {
- compatible = "haoyu,hym8563";
- reg = <0x51>;
- #clock-cells = <0>;
- interrupt-parent = <&gpio4>;
- interrupts = <RK_PC1 IRQ_TYPE_LEVEL_LOW>;
- pinctrl-names = "default";
- pinctrl-0 = <&rtc_int_l>;
- wakeup-source;
- };
-};
-
-&mdio1 {
- reset-delay-us = <20000>;
- reset-gpios = <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>;
- reset-post-delay-us = <100000>;
-
- rgmii_phy: ethernet-phy@1 {
- compatible = "ethernet-phy-ieee802.3-c22";
- reg = <0x1>;
- };
};
&pinctrl {
- ethernet {
- gmac1_rstn_l: gmac1-rstn-l {
- rockchip,pins = <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
leds {
led1: led1 {
rockchip,pins = <4 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
@@ -269,22 +79,6 @@ led_sys: led-sys {
};
};
- rtc {
- rtc_int_l: rtc-int-l {
- rockchip,pins = <4 RK_PC1 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-
- sdmmc {
- sdmmc_vol_ctrl_h: sdmmc-vol-ctrl-h {
- rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- sdmmc_pwren_l: sdmmc-pwren-l {
- rockchip,pins = <4 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
usb {
usb20_host1_pwren: usb20-host1-pwren {
rockchip,pins = <4 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
@@ -292,52 +86,6 @@ usb20_host1_pwren: usb20-host1-pwren {
};
};
-&pwm1 {
- pinctrl-names = "default";
- pinctrl-0 = <&pwm1m0_pins>;
- status = "okay";
-};
-
-&pwm2 {
- pinctrl-names = "default";
- pinctrl-0 = <&pwm2m0_pins>;
- status = "okay";
-};
-
-&saradc {
- vref-supply = <&vcc_1v8>;
- status = "okay";
-};
-
-&sdhci {
- bus-width = <8>;
- cap-mmc-highspeed;
- mmc-hs200-1_8v;
- no-sd;
- no-sdio;
- non-removable;
- vmmc-supply = <&vcc_3v3>;
- vqmmc-supply = <&vcc_1v8>;
- status = "okay";
-};
-
-&sdmmc {
- bus-width = <4>;
- cap-mmc-highspeed;
- cap-sd-highspeed;
- disable-wp;
- sd-uhs-sdr104;
- vmmc-supply = <&vcc3v3_sd>;
- vqmmc-supply = <&vccio_sd>;
- status = "okay";
-};
-
-&uart0 {
- pinctrl-names = "default";
- pinctrl-0 = <&uart0m0_xfer>;
- status = "okay";
-};
-
&usb_host0_ehci {
status = "okay";
};
@@ -346,23 +94,7 @@ &usb_host0_ohci {
status = "okay";
};
-&usb_host0_xhci {
- extcon = <&usb2phy>;
- maximum-speed = "high-speed";
- phys = <&usb2phy_otg>;
- phy-names = "usb2-phy";
- status = "okay";
-};
-
-&usb2phy {
- status = "okay";
-};
-
&usb2phy_host {
phy-supply = <&usb2_host_5v>;
status = "okay";
};
-
-&usb2phy_otg {
- status = "okay";
-};
diff --git a/arch/arm64/boot/dts/rockchip/rk3528-nanopi.dtsi b/arch/arm64/boot/dts/rockchip/rk3528-nanopi.dtsi
new file mode 100644
index 0000000000..1980d14d6f
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3528-nanopi.dtsi
@@ -0,0 +1,278 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Common parts of the FriendlyElec RK3528 boards: NanoPi Zero2 and NanoPi R28S.
+ */
+
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/pwm/pwm.h>
+#include "rk3528.dtsi"
+
+/ {
+ aliases {
+ ethernet0 = &gmac1;
+ i2c1 = &i2c1;
+ mmc0 = &sdhci;
+ mmc1 = &sdmmc;
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:1500000n8";
+ };
+
+ adc-keys-0 {
+ compatible = "adc-keys";
+ io-channels = <&saradc 0>;
+ io-channel-names = "buttons";
+ keyup-threshold-microvolt = <1800000>;
+ poll-interval = <100>;
+
+ button-maskrom {
+ label = "MASK";
+ linux,code = <KEY_SETUP>;
+ press-threshold-microvolt = <0>;
+ };
+ };
+
+ vdd_0v9: regulator-0v9-vdd {
+ compatible = "regulator-fixed";
+ regulator-name = "vdd_0v9";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <900000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+ vcc_ddr: regulator-1v1-vcc-ddr {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_ddr";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1100000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+ vcc_1v8: regulator-1v8-vcc {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_1v8";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ vin-supply = <&vcc_3v3>;
+ };
+
+ vcc_3v3: regulator-3v3-vcc {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_3v3";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+ vcc3v3_sd: regulator-3v3-vcc-sd {
+ compatible = "regulator-fixed";
+ gpios = <&gpio4 RK_PA1 GPIO_ACTIVE_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdmmc_pwren_l>;
+ regulator-name = "vcc3v3_sd";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&vcc_3v3>;
+ };
+
+ vcc5v0_sys: regulator-5v0-vcc-sys {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_sys";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ };
+
+ vccio_sd: regulator-vccio-sd {
+ compatible = "regulator-gpio";
+ gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdmmc_vol_ctrl_h>;
+ regulator-name = "vccio_sd";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ states = <1800000 0x0>, <3300000 0x1>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+ vdd_arm: regulator-vdd-arm {
+ compatible = "pwm-regulator";
+ pwms = <&pwm1 0 5000 PWM_POLARITY_INVERTED>;
+ pwm-supply = <&vcc5v0_sys>;
+ regulator-name = "vdd_arm";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <746000>;
+ regulator-max-microvolt = <1201000>;
+ regulator-settling-time-up-us = <250>;
+ };
+
+ vdd_logic: regulator-vdd-logic {
+ compatible = "pwm-regulator";
+ pwms = <&pwm2 0 5000 PWM_POLARITY_INVERTED>;
+ pwm-supply = <&vcc5v0_sys>;
+ regulator-name = "vdd_logic";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <705000>;
+ regulator-max-microvolt = <1006000>;
+ regulator-settling-time-up-us = <250>;
+ };
+};
+
+&cpu0 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cpu1 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cpu2 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cpu3 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&gmac1 {
+ clock_in_out = "output";
+ phy-handle = <&rgmii_phy>;
+ phy-mode = "rgmii-id";
+ phy-supply = <&vcc_3v3>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&rgmii_miim>, <&rgmii_tx_bus2>, <&rgmii_rx_bus2>,
+ <&rgmii_rgmii_clk>, <&rgmii_rgmii_bus>, <&gmac1_rstn_l>;
+ status = "okay";
+};
+
+&gpu {
+ mali-supply = <&vdd_logic>;
+ status = "okay";
+};
+
+&i2c1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c1m0_xfer>;
+ status = "okay";
+
+ hym8563: rtc@51 {
+ compatible = "haoyu,hym8563";
+ reg = <0x51>;
+ #clock-cells = <0>;
+ interrupt-parent = <&gpio4>;
+ interrupts = <RK_PC1 IRQ_TYPE_LEVEL_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&rtc_int_l>;
+ wakeup-source;
+ };
+};
+
+&mdio1 {
+ reset-delay-us = <20000>;
+ reset-gpios = <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>;
+ reset-post-delay-us = <100000>;
+
+ rgmii_phy: ethernet-phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <0x1>;
+ };
+};
+
+&pinctrl {
+ ethernet {
+ gmac1_rstn_l: gmac1-rstn-l {
+ rockchip,pins = <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ rtc {
+ rtc_int_l: rtc-int-l {
+ rockchip,pins = <4 RK_PC1 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ sdmmc {
+ sdmmc_pwren_l: sdmmc-pwren-l {
+ rockchip,pins = <4 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ sdmmc_vol_ctrl_h: sdmmc-vol-ctrl-h {
+ rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+};
+
+&pwm1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm1m0_pins>;
+ status = "okay";
+};
+
+&pwm2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm2m0_pins>;
+ status = "okay";
+};
+
+&saradc {
+ vref-supply = <&vcc_1v8>;
+ status = "okay";
+};
+
+&sdhci {
+ bus-width = <8>;
+ cap-mmc-highspeed;
+ mmc-hs200-1_8v;
+ no-sd;
+ no-sdio;
+ non-removable;
+ vmmc-supply = <&vcc_3v3>;
+ vqmmc-supply = <&vcc_1v8>;
+ status = "okay";
+};
+
+&sdmmc {
+ bus-width = <4>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
+ disable-wp;
+ sd-uhs-sdr104;
+ vmmc-supply = <&vcc3v3_sd>;
+ vqmmc-supply = <&vccio_sd>;
+ status = "okay";
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0m0_xfer>;
+ status = "okay";
+};
+
+&usb_host0_xhci {
+ extcon = <&usb2phy>;
+ maximum-speed = "high-speed";
+ phys = <&usb2phy_otg>;
+ phy-names = "usb2-phy";
+ status = "okay";
+};
+
+&usb2phy {
+ status = "okay";
+};
+
+&usb2phy_otg {
+ status = "okay";
+};
--
2.55.0
^ permalink raw reply [flat|nested] 11+ messages in thread* [PATCH v3 4/5] arm64: dts: rockchip: Add devicetree for the FriendlyElec NanoPi R28S
2026-09-09 14:33 [PATCH v3 0/5] arm64: dts: rockchip: Add FriendlyElec NanoPi R28S 安容 via B4 Relay
` (2 preceding siblings ...)
2026-09-09 14:33 ` [PATCH v3 3/5] arm64: dts: rockchip: Split out the common NanoPi RK3528 parts 安容 via B4 Relay
@ 2026-09-09 14:33 ` 安容 via B4 Relay
2026-09-09 14:33 ` [PATCH v3 5/5] arm64: dts: rockchip: Follow the DTS coding style in the NanoPi RK3528 devicetrees 安容 via B4 Relay
4 siblings, 0 replies; 11+ messages in thread
From: 安容 via B4 Relay @ 2026-09-09 14:33 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner
Cc: devicetree, linux-arm-kernel, linux-rockchip, linux-kernel,
Chukun Pan, jensen, Andrey Korshunov, Diederik de Haas,
安容
From: 安容 <HystericalDragons@proton.me>
The NanoPi R28S is a dual gigabit Ethernet router board based on the
Rockchip RK3528 SoC, designed and developed by FriendlyElec. It shares
most of its design with the NanoPi Zero2, so it builds on the common
rk3528-nanopi.dtsi.
Specification:
- Rockchip RK3528
- 1GB RAM
- eMMC socket (optional)
- MicroSD slot
- 1x 1000Base-T (GMAC1, Realtek RTL8211F)
- 1x 1000Base-T (PCIe, Realtek RTL8111H)
- AICSemi AIC8800D80 SDIO WiFi
- 3x LEDs (SYS, LAN, WAN)
- 1x USB 2.0 Type-C, peripheral only, shared with the 5V power input
- User and MaskROM buttons
- Haoyu HYM8563 RTC
- 1x USB Type-C debug UART (onboard WCH CH340E)
Assisted-by: LLM
Signed-off-by: 安容 <HystericalDragons@proton.me>
---
arch/arm64/boot/dts/rockchip/Makefile | 1 +
.../arm64/boot/dts/rockchip/rk3528-nanopi-r28s.dts | 145 +++++++++++++++++++++
2 files changed, 146 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
index b677914cd3..51a9889088 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -94,6 +94,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-vicharak-vaaman.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399pro-rock-pi-n10.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3528-armsom-sige1.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3528-hinlink-h28k.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3528-nanopi-r28s.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3528-nanopi-zero2.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3528-radxa-e20c.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3528-rock-2a.dtb
diff --git a/arch/arm64/boot/dts/rockchip/rk3528-nanopi-r28s.dts b/arch/arm64/boot/dts/rockchip/rk3528-nanopi-r28s.dts
new file mode 100644
index 0000000000..6ad45d91cb
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3528-nanopi-r28s.dts
@@ -0,0 +1,145 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2022 Rockchip Electronics Co., Ltd.
+ * Copyright (c) 2026 FriendlyElec Computer Tech. Co., Ltd.
+ * Copyright (c) 2026 安容 <HystericalDragons@proton.me>
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/leds/common.h>
+#include "rk3528-nanopi.dtsi"
+
+/ {
+ model = "FriendlyElec NanoPi R28S";
+ compatible = "friendlyarm,nanopi-r28s", "rockchip,rk3528";
+
+ aliases {
+ mmc2 = &sdio0;
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+ pinctrl-0 = <&usr_btn>;
+ pinctrl-names = "default";
+
+ button-user {
+ debounce-interval = <50>;
+ gpios = <&gpio4 RK_PB2 GPIO_ACTIVE_LOW>;
+ label = "USER";
+ linux,code = <KEY_RESTART>;
+ wakeup-source;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-0 = <&led1>, <&led2>, <&led_sys>;
+ pinctrl-names = "default";
+
+ led-lan {
+ color = <LED_COLOR_ID_GREEN>;
+ default-state = "off";
+ function = LED_FUNCTION_LAN;
+ gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "netdev";
+ };
+
+ led-sys {
+ color = <LED_COLOR_ID_RED>;
+ default-state = "on";
+ function = LED_FUNCTION_HEARTBEAT;
+ gpios = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ };
+
+ led-wan {
+ color = <LED_COLOR_ID_GREEN>;
+ default-state = "off";
+ function = LED_FUNCTION_WAN;
+ gpios = <&gpio4 RK_PB1 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "netdev";
+ };
+ };
+
+ sdio_pwrseq: sdio-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ pinctrl-0 = <&pwr_wf>;
+ pinctrl-names = "default";
+ post-power-on-delay-ms = <100>;
+ reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
+ };
+};
+
+&combphy {
+ status = "okay";
+};
+
+&pcie {
+ pinctrl-0 = <&pcie_eth_perstb>;
+ pinctrl-names = "default";
+ reset-gpios = <&gpio4 RK_PC0 GPIO_ACTIVE_HIGH>;
+ vpcie3v3-supply = <&vcc_3v3>;
+
+ status = "okay";
+};
+
+&pinctrl {
+ gpio-keys {
+ usr_btn: usr-btn {
+ rockchip,pins = <4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ leds {
+ led1: led1 {
+ rockchip,pins = <4 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ led2: led2 {
+ rockchip,pins = <4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ led_sys: led-sys {
+ rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ pcie {
+ pcie_eth_perstb: pcie-eth-perstb {
+ rockchip,pins = <4 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ wifi {
+ pwr_wf: pwr-wf {
+ rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+};
+
+&sdio0 {
+ bus-width = <4>;
+ cap-sd-highspeed;
+ cap-sdio-irq;
+ keep-power-in-suspend;
+ mmc-pwrseq = <&sdio_pwrseq>;
+ non-removable;
+ sd-uhs-sdr104;
+ vqmmc-supply = <&vcc_1v8>;
+
+ status = "okay";
+};
+
+&uart2 {
+ pinctrl-0 = <&uart2m1_xfer>, <&uart2m1_ctsn>, <&uart2m1_rtsn>;
+ pinctrl-names = "default";
+ uart-has-rtscts;
+
+ status = "okay";
+};
+
+&usb_host0_xhci {
+ /* Type-C port, shared with the 5V power input */
+ dr_mode = "peripheral";
+};
--
2.55.0
^ permalink raw reply [flat|nested] 11+ messages in thread* [PATCH v3 5/5] arm64: dts: rockchip: Follow the DTS coding style in the NanoPi RK3528 devicetrees
2026-09-09 14:33 [PATCH v3 0/5] arm64: dts: rockchip: Add FriendlyElec NanoPi R28S 安容 via B4 Relay
` (3 preceding siblings ...)
2026-09-09 14:33 ` [PATCH v3 4/5] arm64: dts: rockchip: Add devicetree for the FriendlyElec NanoPi R28S 安容 via B4 Relay
@ 2026-09-09 14:33 ` 安容 via B4 Relay
2026-09-09 17:42 ` Diederik de Haas
4 siblings, 1 reply; 11+ messages in thread
From: 安容 via B4 Relay @ 2026-09-09 14:33 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner
Cc: devicetree, linux-arm-kernel, linux-rockchip, linux-kernel,
Chukun Pan, jensen, Andrey Korshunov, Diederik de Haas,
安容
From: 安容 <HystericalDragons@proton.me>
scripts/dtc/dt-check-style --mode=strict reports two deviations from
Documentation/devicetree/bindings/dts-coding-style.rst in the shared
NanoPi RK3528 devicetree and in the NanoPi Zero2 board devicetree:
"pinctrl-0" has to sort before "pinctrl-names", and "status" has to be
preceded by a blank line when the node has content before it.
Sort the properties and add the missing blank lines. The generated
devicetree blobs are unchanged.
The remaining findings of the tool are left alone, as they contradict
the established practice in arch/arm64/boot/dts/rockchip: "model"
before "compatible", "regulator-name" before the other regulator
properties, "regulator-min-microvolt" before "regulator-max-microvolt",
"pwms" before "pwm-supply" and "linux,code" before "wakeup-source" or
"press-threshold-microvolt".
Suggested-by: Diederik de Haas <diederik@cknow-tech.com>
Signed-off-by: 安容 <HystericalDragons@proton.me>
---
.../boot/dts/rockchip/rk3528-nanopi-zero2.dts | 5 +++--
arch/arm64/boot/dts/rockchip/rk3528-nanopi.dtsi | 26 +++++++++++++++-------
2 files changed, 21 insertions(+), 10 deletions(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3528-nanopi-zero2.dts b/arch/arm64/boot/dts/rockchip/rk3528-nanopi-zero2.dts
index 48e4273872..96c537da6a 100644
--- a/arch/arm64/boot/dts/rockchip/rk3528-nanopi-zero2.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3528-nanopi-zero2.dts
@@ -25,8 +25,8 @@ button-recovery {
leds {
compatible = "gpio-leds";
- pinctrl-names = "default";
pinctrl-0 = <&led1>, <&led_sys>;
+ pinctrl-names = "default";
led-0 {
color = <LED_COLOR_ID_RED>;
@@ -59,8 +59,8 @@ usb2_host_5v: regulator-5v0-usb2-host {
compatible = "regulator-fixed";
enable-active-high;
gpios = <&gpio4 RK_PB5 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
pinctrl-0 = <&usb20_host1_pwren>;
+ pinctrl-names = "default";
regulator-name = "usb2_host_5v";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
@@ -96,5 +96,6 @@ &usb_host0_ohci {
&usb2phy_host {
phy-supply = <&usb2_host_5v>;
+
status = "okay";
};
diff --git a/arch/arm64/boot/dts/rockchip/rk3528-nanopi.dtsi b/arch/arm64/boot/dts/rockchip/rk3528-nanopi.dtsi
index 1980d14d6f..45e31b90a7 100644
--- a/arch/arm64/boot/dts/rockchip/rk3528-nanopi.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3528-nanopi.dtsi
@@ -77,8 +77,8 @@ vcc_3v3: regulator-3v3-vcc {
vcc3v3_sd: regulator-3v3-vcc-sd {
compatible = "regulator-fixed";
gpios = <&gpio4 RK_PA1 GPIO_ACTIVE_LOW>;
- pinctrl-names = "default";
pinctrl-0 = <&sdmmc_pwren_l>;
+ pinctrl-names = "default";
regulator-name = "vcc3v3_sd";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
@@ -97,8 +97,8 @@ vcc5v0_sys: regulator-5v0-vcc-sys {
vccio_sd: regulator-vccio-sd {
compatible = "regulator-gpio";
gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
pinctrl-0 = <&sdmmc_vol_ctrl_h>;
+ pinctrl-names = "default";
regulator-name = "vccio_sd";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
@@ -152,20 +152,23 @@ &gmac1 {
phy-handle = <&rgmii_phy>;
phy-mode = "rgmii-id";
phy-supply = <&vcc_3v3>;
- pinctrl-names = "default";
pinctrl-0 = <&rgmii_miim>, <&rgmii_tx_bus2>, <&rgmii_rx_bus2>,
<&rgmii_rgmii_clk>, <&rgmii_rgmii_bus>, <&gmac1_rstn_l>;
+ pinctrl-names = "default";
+
status = "okay";
};
&gpu {
mali-supply = <&vdd_logic>;
+
status = "okay";
};
&i2c1 {
- pinctrl-names = "default";
pinctrl-0 = <&i2c1m0_xfer>;
+ pinctrl-names = "default";
+
status = "okay";
hym8563: rtc@51 {
@@ -174,8 +177,8 @@ hym8563: rtc@51 {
#clock-cells = <0>;
interrupt-parent = <&gpio4>;
interrupts = <RK_PC1 IRQ_TYPE_LEVEL_LOW>;
- pinctrl-names = "default";
pinctrl-0 = <&rtc_int_l>;
+ pinctrl-names = "default";
wakeup-source;
};
};
@@ -216,19 +219,22 @@ sdmmc_vol_ctrl_h: sdmmc-vol-ctrl-h {
};
&pwm1 {
- pinctrl-names = "default";
pinctrl-0 = <&pwm1m0_pins>;
+ pinctrl-names = "default";
+
status = "okay";
};
&pwm2 {
- pinctrl-names = "default";
pinctrl-0 = <&pwm2m0_pins>;
+ pinctrl-names = "default";
+
status = "okay";
};
&saradc {
vref-supply = <&vcc_1v8>;
+
status = "okay";
};
@@ -241,6 +247,7 @@ &sdhci {
non-removable;
vmmc-supply = <&vcc_3v3>;
vqmmc-supply = <&vcc_1v8>;
+
status = "okay";
};
@@ -252,12 +259,14 @@ &sdmmc {
sd-uhs-sdr104;
vmmc-supply = <&vcc3v3_sd>;
vqmmc-supply = <&vccio_sd>;
+
status = "okay";
};
&uart0 {
- pinctrl-names = "default";
pinctrl-0 = <&uart0m0_xfer>;
+ pinctrl-names = "default";
+
status = "okay";
};
@@ -266,6 +275,7 @@ &usb_host0_xhci {
maximum-speed = "high-speed";
phys = <&usb2phy_otg>;
phy-names = "usb2-phy";
+
status = "okay";
};
--
2.55.0
^ permalink raw reply [flat|nested] 11+ messages in thread* Re: [PATCH v3 5/5] arm64: dts: rockchip: Follow the DTS coding style in the NanoPi RK3528 devicetrees
2026-09-09 14:33 ` [PATCH v3 5/5] arm64: dts: rockchip: Follow the DTS coding style in the NanoPi RK3528 devicetrees 安容 via B4 Relay
@ 2026-09-09 17:42 ` Diederik de Haas
0 siblings, 0 replies; 11+ messages in thread
From: Diederik de Haas @ 2026-09-09 17:42 UTC (permalink / raw)
To: HystericalDragons, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Heiko Stuebner
Cc: devicetree, linux-arm-kernel, linux-rockchip, linux-kernel,
Chukun Pan, jensen, Andrey Korshunov, Diederik de Haas
On Wed Sep 9, 2026 at 4:33 PM CEST, 安容 via B4 Relay wrote:
> From: 安容 <HystericalDragons@proton.me>
>
> scripts/dtc/dt-check-style --mode=strict reports two deviations from
I mentioned dt-check-style as it is a useful tool and it would be
beneficial if more/all future submissions were also checked with it.
I would not make it part of the commit message though.
Just like 'checkpatch' is a tool in the toolbox, so is dt-check-style.
> Documentation/devicetree/bindings/dts-coding-style.rst in the shared
Because the actual reason for this change is a violation of the DTS coding
style ... which I would put in the commit message.
> NanoPi RK3528 devicetree and in the NanoPi Zero2 board devicetree:
> "pinctrl-0" has to sort before "pinctrl-names", and "status" has to be
> preceded by a blank line when the node has content before it.
>
> Sort the properties and add the missing blank lines. The generated
> devicetree blobs are unchanged.
Making explicit which fixes you've done is fine AFAIC, but not strictly
needed as the diff already shows it. I would rather use "No functional
changes.", instead of 'blobs are unchanged'.
> The remaining findings of the tool are left alone, as they contradict
> the established practice in arch/arm64/boot/dts/rockchip: "model"
> before "compatible", "regulator-name" before the other regulator
> properties, "regulator-min-microvolt" before "regulator-max-microvolt",
> "pwms" before "pwm-supply" and "linux,code" before "wakeup-source" or
> "press-threshold-microvolt".
But as you noticed, it's not flawless. My guess is that it actually does
an alphanumerical sort, while the DTS coding style prescribes a natural
sorting. Dunno if there's an actual (enforceable) definition for it.
I would not list what I see as tool errors in the commit message though.
AFAIC no need for a new version for (just) this though.
My 0.02
Cheers,
Diederik
> Suggested-by: Diederik de Haas <diederik@cknow-tech.com>
> Signed-off-by: 安容 <HystericalDragons@proton.me>
> ---
> .../boot/dts/rockchip/rk3528-nanopi-zero2.dts | 5 +++--
> arch/arm64/boot/dts/rockchip/rk3528-nanopi.dtsi | 26 +++++++++++++++-------
> 2 files changed, 21 insertions(+), 10 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/rockchip/rk3528-nanopi-zero2.dts b/arch/arm64/boot/dts/rockchip/rk3528-nanopi-zero2.dts
> index 48e4273872..96c537da6a 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3528-nanopi-zero2.dts
> +++ b/arch/arm64/boot/dts/rockchip/rk3528-nanopi-zero2.dts
> @@ -25,8 +25,8 @@ button-recovery {
>
> leds {
> compatible = "gpio-leds";
> - pinctrl-names = "default";
> pinctrl-0 = <&led1>, <&led_sys>;
> + pinctrl-names = "default";
>
> led-0 {
> color = <LED_COLOR_ID_RED>;
> @@ -59,8 +59,8 @@ usb2_host_5v: regulator-5v0-usb2-host {
> compatible = "regulator-fixed";
> enable-active-high;
> gpios = <&gpio4 RK_PB5 GPIO_ACTIVE_HIGH>;
> - pinctrl-names = "default";
> pinctrl-0 = <&usb20_host1_pwren>;
> + pinctrl-names = "default";
> regulator-name = "usb2_host_5v";
> regulator-min-microvolt = <5000000>;
> regulator-max-microvolt = <5000000>;
> @@ -96,5 +96,6 @@ &usb_host0_ohci {
>
> &usb2phy_host {
> phy-supply = <&usb2_host_5v>;
> +
> status = "okay";
> };
> diff --git a/arch/arm64/boot/dts/rockchip/rk3528-nanopi.dtsi b/arch/arm64/boot/dts/rockchip/rk3528-nanopi.dtsi
> index 1980d14d6f..45e31b90a7 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3528-nanopi.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3528-nanopi.dtsi
> @@ -77,8 +77,8 @@ vcc_3v3: regulator-3v3-vcc {
> vcc3v3_sd: regulator-3v3-vcc-sd {
> compatible = "regulator-fixed";
> gpios = <&gpio4 RK_PA1 GPIO_ACTIVE_LOW>;
> - pinctrl-names = "default";
> pinctrl-0 = <&sdmmc_pwren_l>;
> + pinctrl-names = "default";
> regulator-name = "vcc3v3_sd";
> regulator-min-microvolt = <3300000>;
> regulator-max-microvolt = <3300000>;
> @@ -97,8 +97,8 @@ vcc5v0_sys: regulator-5v0-vcc-sys {
> vccio_sd: regulator-vccio-sd {
> compatible = "regulator-gpio";
> gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
> - pinctrl-names = "default";
> pinctrl-0 = <&sdmmc_vol_ctrl_h>;
> + pinctrl-names = "default";
> regulator-name = "vccio_sd";
> regulator-min-microvolt = <1800000>;
> regulator-max-microvolt = <3300000>;
> @@ -152,20 +152,23 @@ &gmac1 {
> phy-handle = <&rgmii_phy>;
> phy-mode = "rgmii-id";
> phy-supply = <&vcc_3v3>;
> - pinctrl-names = "default";
> pinctrl-0 = <&rgmii_miim>, <&rgmii_tx_bus2>, <&rgmii_rx_bus2>,
> <&rgmii_rgmii_clk>, <&rgmii_rgmii_bus>, <&gmac1_rstn_l>;
> + pinctrl-names = "default";
> +
> status = "okay";
> };
>
> &gpu {
> mali-supply = <&vdd_logic>;
> +
> status = "okay";
> };
>
> &i2c1 {
> - pinctrl-names = "default";
> pinctrl-0 = <&i2c1m0_xfer>;
> + pinctrl-names = "default";
> +
> status = "okay";
>
> hym8563: rtc@51 {
> @@ -174,8 +177,8 @@ hym8563: rtc@51 {
> #clock-cells = <0>;
> interrupt-parent = <&gpio4>;
> interrupts = <RK_PC1 IRQ_TYPE_LEVEL_LOW>;
> - pinctrl-names = "default";
> pinctrl-0 = <&rtc_int_l>;
> + pinctrl-names = "default";
> wakeup-source;
> };
> };
> @@ -216,19 +219,22 @@ sdmmc_vol_ctrl_h: sdmmc-vol-ctrl-h {
> };
>
> &pwm1 {
> - pinctrl-names = "default";
> pinctrl-0 = <&pwm1m0_pins>;
> + pinctrl-names = "default";
> +
> status = "okay";
> };
>
> &pwm2 {
> - pinctrl-names = "default";
> pinctrl-0 = <&pwm2m0_pins>;
> + pinctrl-names = "default";
> +
> status = "okay";
> };
>
> &saradc {
> vref-supply = <&vcc_1v8>;
> +
> status = "okay";
> };
>
> @@ -241,6 +247,7 @@ &sdhci {
> non-removable;
> vmmc-supply = <&vcc_3v3>;
> vqmmc-supply = <&vcc_1v8>;
> +
> status = "okay";
> };
>
> @@ -252,12 +259,14 @@ &sdmmc {
> sd-uhs-sdr104;
> vmmc-supply = <&vcc3v3_sd>;
> vqmmc-supply = <&vccio_sd>;
> +
> status = "okay";
> };
>
> &uart0 {
> - pinctrl-names = "default";
> pinctrl-0 = <&uart0m0_xfer>;
> + pinctrl-names = "default";
> +
> status = "okay";
> };
>
> @@ -266,6 +275,7 @@ &usb_host0_xhci {
> maximum-speed = "high-speed";
> phys = <&usb2phy_otg>;
> phy-names = "usb2-phy";
> +
> status = "okay";
> };
>
^ permalink raw reply [flat|nested] 11+ messages in thread