* [PATCH v2 1/3] dt-bindings: usb: starfive,jhb100-dwc3: Add adapter register region
2026-11-03 6:48 [PATCH v2 0/3] Add StarFive JHB100 host field USB device controller driver Minda Chen
@ 2026-11-03 6:48 ` Minda Chen
2026-11-03 11:48 ` Krzysztof Kozlowski
2026-11-03 6:48 ` [PATCH v2 2/3] dt-bindings: usb: starfive,jhb100-dwc3: Add clock number limit Minda Chen
2026-11-03 6:48 ` [PATCH v2 3/3] usb: dwc3: starfive: Add JHB100 USB device adapter port enable quirk Minda Chen
2 siblings, 1 reply; 6+ messages in thread
From: Minda Chen @ 2026-11-03 6:48 UTC (permalink / raw)
To: Greg Kroah-Hartman, Thinh Nguyen, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, linux-usb
Cc: linux-kernel, devicetree, Minda Chen
Add dt-binding of JHB100 server host field USB device controller,
which still using dwc3 usb core and contains an extra PHY adapter
register IO register region. Require to add IO register descriptions
and regs-name list.
To compat with normal bmc usb, which contains only 1 dwc3 core IO
register region, add miniItem to 1.
Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
---
.../devicetree/bindings/usb/starfive,jhb100-dwc3.yaml | 11 ++++++++++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/usb/starfive,jhb100-dwc3.yaml b/Documentation/devicetree/bindings/usb/starfive,jhb100-dwc3.yaml
index fbabe99e9d5c..bbaefad3b400 100644
--- a/Documentation/devicetree/bindings/usb/starfive,jhb100-dwc3.yaml
+++ b/Documentation/devicetree/bindings/usb/starfive,jhb100-dwc3.yaml
@@ -20,7 +20,16 @@ properties:
const: starfive,jhb100-dwc3
reg:
- maxItems: 1
+ minItems: 1
+ items:
+ - description: DWC3 core registers
+ - description: DWC3 device controller PHY adapter registers
+
+ reg-names:
+ minItems: 1
+ items:
+ - const: core
+ - const: adapter
interrupts:
maxItems: 1
--
2.17.1
^ permalink raw reply [flat|nested] 6+ messages in thread* [PATCH v2 2/3] dt-bindings: usb: starfive,jhb100-dwc3: Add clock number limit
2026-11-03 6:48 [PATCH v2 0/3] Add StarFive JHB100 host field USB device controller driver Minda Chen
2026-11-03 6:48 ` [PATCH v2 1/3] dt-bindings: usb: starfive,jhb100-dwc3: Add adapter register region Minda Chen
@ 2026-11-03 6:48 ` Minda Chen
2026-11-03 11:50 ` Krzysztof Kozlowski
2026-11-03 6:48 ` [PATCH v2 3/3] usb: dwc3: starfive: Add JHB100 USB device adapter port enable quirk Minda Chen
2 siblings, 1 reply; 6+ messages in thread
From: Minda Chen @ 2026-11-03 6:48 UTC (permalink / raw)
To: Greg Kroah-Hartman, Thinh Nguyen, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, linux-usb
Cc: linux-kernel, devicetree, Minda Chen
StarFive JHB100 device controller do not connect with PHY
but connect with digital adapter module. So it do not
contain core reference clock. So the minimal clock number is 2
(glue layer main enable clock and dwc3 core bus clk). So Add
minItem 2 to clock and clock-names items.
Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
---
Documentation/devicetree/bindings/usb/starfive,jhb100-dwc3.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/usb/starfive,jhb100-dwc3.yaml b/Documentation/devicetree/bindings/usb/starfive,jhb100-dwc3.yaml
index bbaefad3b400..1fc73ba67394 100644
--- a/Documentation/devicetree/bindings/usb/starfive,jhb100-dwc3.yaml
+++ b/Documentation/devicetree/bindings/usb/starfive,jhb100-dwc3.yaml
@@ -35,12 +35,14 @@ properties:
maxItems: 1
clocks:
+ minItems: 2
items:
- description: USB main enable clk
- description: DWC3 bus early clock
- description: DWC3 ref clock
clock-names:
+ minItems: 2
items:
- const: main
- const: bus_early
--
2.17.1
^ permalink raw reply [flat|nested] 6+ messages in thread* [PATCH v2 3/3] usb: dwc3: starfive: Add JHB100 USB device adapter port enable quirk
2026-11-03 6:48 [PATCH v2 0/3] Add StarFive JHB100 host field USB device controller driver Minda Chen
2026-11-03 6:48 ` [PATCH v2 1/3] dt-bindings: usb: starfive,jhb100-dwc3: Add adapter register region Minda Chen
2026-11-03 6:48 ` [PATCH v2 2/3] dt-bindings: usb: starfive,jhb100-dwc3: Add clock number limit Minda Chen
@ 2026-11-03 6:48 ` Minda Chen
2 siblings, 0 replies; 6+ messages in thread
From: Minda Chen @ 2026-11-03 6:48 UTC (permalink / raw)
To: Greg Kroah-Hartman, Thinh Nguyen, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, linux-usb
Cc: linux-kernel, devicetree, Minda Chen
Add an extra iomem field to struct dwc3_gerneric, so as JHB100
can add PHY adapter setting. Other soc also can use it.
Also Add Starfive JHB100 USB 2.0 device controller generic init
function to remap PHY adapter io memory region and add adapter
pre-run/stop function.
On the JHB100 BMC SoC, each DWC3 device controller is connected to a
port of the xHCI controller that is exported to the server host over
PCIe, through a PHY adapter. Setting the adapter USB 2.0 port enable
bit asserts the connect status in the xHCI PORTSC register, so it must
only be set once the gadget is ready to be enumerated, otherwise the
host fails to enumerate the device. And clear the ppt enable bit
while gadget device stop.
Add an optional "adapter" register region and toggle the port enable
bit from the pre_run_stop glue callback.
Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
---
drivers/usb/dwc3/dwc3-generic-plat.c | 48 +++++++++++++++++++++++++++-
1 file changed, 47 insertions(+), 1 deletion(-)
diff --git a/drivers/usb/dwc3/dwc3-generic-plat.c b/drivers/usb/dwc3/dwc3-generic-plat.c
index ca69ac0eb07c..ebcd43442fc4 100644
--- a/drivers/usb/dwc3/dwc3-generic-plat.c
+++ b/drivers/usb/dwc3/dwc3-generic-plat.c
@@ -22,12 +22,15 @@
#define EIC7700_HSP_AXI_LP_XM_CSYSREQ BIT(0)
#define EIC7700_HSP_AXI_LP_XS_CSYSREQ BIT(16)
+#define STARFIVE_JHB100_ADAPTER_PORT_EN BIT(20)
+
struct dwc3_generic {
struct device *dev;
struct dwc3 dwc;
struct clk_bulk_data *clks;
int num_clocks;
struct reset_control *resets;
+ void __iomem *regs;
};
struct dwc3_generic_config {
@@ -42,6 +45,44 @@ static void dwc3_generic_reset_control_assert(void *data)
reset_control_assert(data);
}
+static void dwc3_starfive_jhb100_pre_run_stop(struct dwc3 *dwc3, bool start)
+{
+ struct dwc3_generic *data = to_dwc3_generic(dwc3);
+ u32 val;
+
+ val = readl(data->regs);
+
+ if (start)
+ val |= STARFIVE_JHB100_ADAPTER_PORT_EN;
+ else
+ val &= ~STARFIVE_JHB100_ADAPTER_PORT_EN;
+
+ writel(val, data->regs);
+}
+
+static const struct dwc3_glue_ops starfive_jhb100_glue_ops = {
+ .pre_run_stop = dwc3_starfive_jhb100_pre_run_stop,
+};
+
+static int starfive_dwc3_jhb100_init(struct dwc3_generic *dwc3g)
+{
+ struct platform_device *pdev = to_platform_device(dwc3g->dev);
+ struct resource *res;
+
+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "adapter");
+ if (res) {
+ /* usb device controller with adapter */
+ dwc3g->regs = devm_ioremap_resource(&pdev->dev, res);
+ if (IS_ERR(dwc3g->regs))
+ return dev_err_probe(&pdev->dev, PTR_ERR(dwc3g->regs),
+ "failed to get adapter regs\n");
+
+ dwc3g->dwc.glue_ops = &starfive_jhb100_glue_ops;
+ }
+
+ return 0;
+}
+
static int dwc3_eic7700_init(struct dwc3_generic *dwc3g)
{
struct device *dev = dwc3g->dev;
@@ -231,12 +272,17 @@ static const struct dwc3_generic_config eic7700_dwc3 = {
.properties = DWC3_DEFAULT_PROPERTIES,
};
+static const struct dwc3_generic_config starfive_jhb100_dwc3 = {
+ .init = starfive_dwc3_jhb100_init,
+ .properties = DWC3_DEFAULT_PROPERTIES,
+};
+
static const struct of_device_id dwc3_generic_of_match[] = {
{ .compatible = "spacemit,k1-dwc3", &spacemit_k1_dwc3},
{ .compatible = "spacemit,k3-dwc3", },
{ .compatible = "fsl,ls1028a-dwc3", &fsl_ls1028_dwc3},
{ .compatible = "eswin,eic7700-dwc3", &eic7700_dwc3},
- { .compatible = "starfive,jhb100-dwc3", },
+ { .compatible = "starfive,jhb100-dwc3", &starfive_jhb100_dwc3},
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, dwc3_generic_of_match);
--
2.17.1
^ permalink raw reply [flat|nested] 6+ messages in thread