From: "Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>
To: Richard Cheng <icheng@nvidia.com>
Cc: tony.luck@intel.com, Reinette Chatre <reinette.chatre@intel.com>,
shuah@kernel.org, Dave.Martin@arm.com, james.morse@arm.com,
babu.moger@amd.com, LKML <linux-kernel@vger.kernel.org>,
linux-kselftest@vger.kernel.org, yu.c.chen@intel.com,
fenghuay@nvidia.com, newtonl@nvidia.com, kristinc@nvidia.com,
kaihengf@nvidia.com, kobak@nvidia.com
Subject: Re: [PATCH v3 3/3] selftests/resctrl: Recognise aarch64 as a vendor for L3_NONCONT_CAT
Date: Sun, 31 May 2026 22:01:12 +0300 (EEST) [thread overview]
Message-ID: <204dca67-629e-1ea7-cad3-b63459f6e464@linux.intel.com> (raw)
In-Reply-To: <20260529022352.8308-4-icheng@nvidia.com>
[-- Attachment #1: Type: text/plain, Size: 3451 bytes --]
On Fri, 29 May 2026, Richard Cheng wrote:
> aarch64 has no vendor_id in /proc/cpuinfo, so detect_vendor() returns 0
> and arch_supports_noncont_cat() falls through to "return false".
> L3_NONCONT_CAT therefore spuriously fails on every ARM MPAM platform.
>
> Define ARCH_ARM, short-circuit detect_vendor() to it on aarch64, and
> add it to the AMD/Hygon always-supports early-out in
> arch_supports_noncont_cat().
>
> aarch64 has many implementers (ARM 0x41, NVIDIA 0x43, etc.), but MPAM
> mandates non-contiguous CPBM uniformly, so per-implementer handling is
> not needed here.
>
> Signed-off-by: Richard Cheng <icheng@nvidia.com>
> ---
> tools/testing/selftests/resctrl/cat_test.c | 9 ++++++--
> tools/testing/selftests/resctrl/resctrl.h | 1 +
> .../testing/selftests/resctrl/resctrl_tests.c | 21 +++++++++++++++++++
> 3 files changed, 29 insertions(+), 2 deletions(-)
>
> diff --git a/tools/testing/selftests/resctrl/cat_test.c b/tools/testing/selftests/resctrl/cat_test.c
> index dc414e55ae94..ce66016dbd88 100644
> --- a/tools/testing/selftests/resctrl/cat_test.c
> +++ b/tools/testing/selftests/resctrl/cat_test.c
> @@ -292,8 +292,13 @@ static bool arch_supports_noncont_cat(const struct resctrl_test *test)
> {
> unsigned int vendor_id = get_vendor();
>
> - /* AMD and Hygon always support non-contiguous CBM. */
> - if (vendor_id == ARCH_AMD || vendor_id == ARCH_HYGON)
> + /*
> + * AMD and Hygon always support non-contiguous CBM. ARM/MPAM defines
> + * MPAMCFG_CPBM as a bitmap with no contiguity constraint per ARM
> + * DDI 0598.
> + */
> + if (vendor_id == ARCH_AMD || vendor_id == ARCH_HYGON ||
> + vendor_id == ARCH_ARM)
> return true;
>
> #if defined(__i386__) || defined(__x86_64__) /* arch */
> diff --git a/tools/testing/selftests/resctrl/resctrl.h b/tools/testing/selftests/resctrl/resctrl.h
> index afe635b6e48d..670e5b128b4d 100644
> --- a/tools/testing/selftests/resctrl/resctrl.h
> +++ b/tools/testing/selftests/resctrl/resctrl.h
> @@ -40,6 +40,7 @@
> #define ARCH_INTEL BIT(0)
> #define ARCH_AMD BIT(1)
> #define ARCH_HYGON BIT(2)
> +#define ARCH_ARM BIT(3)
>
> #define END_OF_TESTS 1
>
> diff --git a/tools/testing/selftests/resctrl/resctrl_tests.c b/tools/testing/selftests/resctrl/resctrl_tests.c
> index dbcd5eea9fbc..cfece594a8c6 100644
> --- a/tools/testing/selftests/resctrl/resctrl_tests.c
> +++ b/tools/testing/selftests/resctrl/resctrl_tests.c
> @@ -23,6 +23,15 @@ static struct resctrl_test *resctrl_tests[] = {
> &l2_noncont_cat_test,
> };
>
> +static bool detect_aarch64(void)
> +{
> +#if defined(__aarch64__)
> + return true;
> +#else
> + return false;
> +#endif
> +}
> +
> static unsigned int detect_vendor(void)
> {
> static unsigned int vendor_id;
> @@ -34,6 +43,18 @@ static unsigned int detect_vendor(void)
> if (initialized)
> return vendor_id;
>
> + if (detect_aarch64()) {
> + /*
> + * aarch64 has no userspace vendor_id in /proc/cpuinfo.
> + * MPAM-capable ARM implementations follow ARM DDI 0598;
> + * treat all aarch64 builds as a single vendor for the
> + * purposes of resctrl selftests.
> + */
> + vendor_id = ARCH_ARM;
> + initialized = true;
> + return vendor_id;
> + }
> +
> inf = fopen("/proc/cpuinfo", "r");
> if (!inf) {
> vendor_id = 0;
>
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
--
i.
next prev parent reply other threads:[~2026-05-31 19:01 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-29 2:23 [PATCH v3 0/3] selftests/resctrl: Fix resctrl selftests issues on aarch64 Richard Cheng
2026-05-29 2:23 ` [PATCH v3 1/3] selftests/resctrl: Skip L3_CAT when no exclusive cache portion exists Richard Cheng
2026-06-26 3:25 ` Reinette Chatre
2026-05-29 2:23 ` [PATCH v3 2/3] selftests/resctrl: Implement cl_flush() and sb() for aarch64 Richard Cheng
2026-06-26 3:26 ` Reinette Chatre
2026-06-26 13:58 ` Ben Horgan
2026-07-02 14:15 ` Ben Horgan
2026-05-29 2:23 ` [PATCH v3 3/3] selftests/resctrl: Recognise aarch64 as a vendor for L3_NONCONT_CAT Richard Cheng
2026-05-31 19:01 ` Ilpo Järvinen [this message]
2026-06-26 3:26 ` Reinette Chatre
2026-05-29 2:28 ` [PATCH v3 0/3] selftests/resctrl: Fix resctrl selftests issues on aarch64 Richard Cheng
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=204dca67-629e-1ea7-cad3-b63459f6e464@linux.intel.com \
--to=ilpo.jarvinen@linux.intel.com \
--cc=Dave.Martin@arm.com \
--cc=babu.moger@amd.com \
--cc=fenghuay@nvidia.com \
--cc=icheng@nvidia.com \
--cc=james.morse@arm.com \
--cc=kaihengf@nvidia.com \
--cc=kobak@nvidia.com \
--cc=kristinc@nvidia.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-kselftest@vger.kernel.org \
--cc=newtonl@nvidia.com \
--cc=reinette.chatre@intel.com \
--cc=shuah@kernel.org \
--cc=tony.luck@intel.com \
--cc=yu.c.chen@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox