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From: Bart Van Assche <bvanassche@acm.org>
To: "Peter Wang (王信友)" <peter.wang@mediatek.com>,
	"vamshigajjela@google.com" <vamshigajjela@google.com>,
	"alim.akhtar@samsung.com" <alim.akhtar@samsung.com>,
	"James.Bottomley@HansenPartnership.com"
	<James.Bottomley@HansenPartnership.com>,
	"martin.petersen@oracle.com" <martin.petersen@oracle.com>,
	"avri.altman@wdc.com" <avri.altman@wdc.com>
Cc: "beanhuo@micron.com" <beanhuo@micron.com>,
	"linux-scsi@vger.kernel.org" <linux-scsi@vger.kernel.org>,
	"adrian.hunter@intel.com" <adrian.hunter@intel.com>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"quic_nguyenb@quicinc.com" <quic_nguyenb@quicinc.com>,
	"arthur.simchaev@sandisk.com" <arthur.simchaev@sandisk.com>
Subject: Re: [PATCH] scsi: ufs: core: Handle MCQ IAG events
Date: Wed, 4 Mar 2026 09:02:57 -0600	[thread overview]
Message-ID: <2cdc620b-b521-4058-a802-87591aa4c253@acm.org> (raw)
In-Reply-To: <1fa500fdfbfff7d43bea1839ce1992fb4283c5eb.camel@mediatek.com>

On 3/3/26 4:25 AM, Peter Wang (王信友) wrote:
> On Mon, 2026-03-02 at 23:31 +0530, vamshi gajjela wrote:
>> @@ -7141,7 +7149,10 @@ static irqreturn_t ufshcd_sl_intr(struct
>> ufs_hba *hba, u32 intr_status)
>>  retval |= ufshcd_transfer_req_compl(hba);
>>  
>>  if (intr_status & MCQ_CQ_EVENT_STATUS)
>> -retval |= ufshcd_handle_mcq_cq_events(hba);
>> +retval |= ufshcd_handle_mcq_cq_events(hba, false);
>> +
>> +if (intr_status & MCQ_IAG_EVENT_STATUS)
>> +retval |= ufshcd_handle_mcq_cq_events(hba, true);
> 
> Hi Vamshi,
> 
> This is strange to me.
> Why does receiving an IAG_EVENT call ufshcd_handle_mcq_cq_events?
> Shouldn't it be ufshcd_handle_mcq_iag_events instead?
Doesn't this follow from the UFSHCI standard? From the UFSHCI 5.0
standard: "MCQ Interrupt Aggregation Event Status (IAGES): This bit is
transparent and becomes ‘1’ when all of the following conditions are met
• Controller is operating in MCQ mode (Config.QT = 1)
• ESI is not enabled (Config.ESIE = 0)
• At least one interrupt aggregation group has triggered, which means it
has satisfied either counter or timer condition

When in MCQ mode, and ESI is not used, SW can use traditional interrupt 
approach. When this bit is set, interrupt routine needs to scan all
interrupt aggregation groups to determine which IAG has caused this
interrupt.

Thanks,

Bart.

  reply	other threads:[~2026-03-04 15:03 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-03-02 18:01 vamshi gajjela
2026-03-03 10:25 ` Peter Wang (王信友)
2026-03-04 15:02   ` Bart Van Assche [this message]
2026-03-05  3:28     ` Peter Wang (王信友)
2026-03-05 12:07       ` Bart Van Assche
2026-03-06  3:49         ` Peter Wang (王信友)
2026-03-06 16:22           ` VAMSHI GAJJELA
2026-03-04 15:03 ` Bart Van Assche

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